#ADC
:INTCON,0B,C0	(PIC16)
:PIR1,0C,40		(PIC16)
:PIE1,8C,40	  	(PIC16)
:ADRESH,1E,FF	(PIC16)
:ADRESL,9E,FF	(PIC16)
:ADCON0,1F,FD	(PIC16)	(!COMP)
:ADCON1,9F,8F	(PIC16)
:TRISA,85,3F	(PIC16)
:PORTA,05,3F	(PIC16)
:TRISE,89,07	(PIC16)
:PORTE,09,07	(PIC16)
:ADRES,1E,FF	(PIC16)
:ANSEL,9D,7F	(PIC16) (A/D6BIT)
:INTCON,FF2,FF  	(PIC18)
:ADRESH,FC4,FF  	(PIC18)
:ADRESL,FC3,FF  	(PIC18)
:ADCON0,FC2,FF  	(PIC18)
:ADCON1,FC1,FF  	(PIC18)
:ADCON2,FC0,87  	(PIC18)
:PORTA,F80,3F	(PIC18)
:TRISA,F92,7F	(PIC18)
:PORTF,F85,7F	(PIC18)
:LATF,F8E,7F	(PIC18)
:TRISF,F97,FF	(PIC18)
:PORTH,F87,F0	(PIC18)
:LATH,F90,F0	(PIC18)
:TRISH,F99,FF	(PIC18)
!ADIF,PIR1.6	(INTS)
	0 : A/D conversion not complete
	1 : A/D conversion complete
!ADIE,PIE1.6	 (INTS)
	0 : A/D converter interrupt disabled
	1 : A/D converter interrupt enabled
!ADCS0,ADCON0.6:2 (PIC16) (A/DNORM)		(!COMP)
	0 : FOSC/2
	1 : FOSC/8
	2 : FOSC/32
	3 : FRC
!CHS0,ADCON0.3:3  (PIC16) (A/DNORM)	(!COMP)
	0 : channel 0
	1 : channel 1
	2 : channel 2
	3 : channel 3
	4 : channel 4
	5 : channel 5
	6 : channel 6
	7 : channel 7
!ADON,ADCON0.0, ADCON0.2 	(!COMP)
	0 : A/D converter disabled
	1 : A/D converter enabled, no conversion in progress
	2 : A/D converter disabled
	3 : A/D converter enabled, conversion in progress
!ADFM,ADCON1.7	(A/DNORM) (A/D10BITANSEL)
	0 : left justified
	1 : right justified
!PCFG0,ADCON1.0:4  (A/DNORM) (A/D10BITANSEL)
	0: RA0 RA1 RA2 RA3 RA5 RE0 RE1 RE2 Ref=Vdd
	1: RA0 RA1 RA2 RA5 RE0 RE1 RE2 Ref=RA3
	2: RA0 RA1 RA2 RA3 RA5 Ref=Vdd
	3: RA0 RA1 RA2 RA5 Ref=RA3
	4: RA0 RA1 RA3 Ref=Vdd
	5: RA0 RA1 Ref=RA3
	6: None
	7: None
	8: RA0 RA1 RA5 RE0 RE1 RE2 Ref=RA2,RA3
	9: RA0 RA1 RA2 RA3 RA5 RE0 Ref=Vdd
	10: RA0 RA1 RA2 RA5 RE0 Ref=RA3
	11: RA0 RA1 RA5 RE0 Ref=RA2,RA3
	12: RA0 RA1 RA5 Ref=RA2,RA3
	13: RA0 RA1 Ref=RA2,RA3
	14: RA0
	15: RA0 Ref=RA2,RA3
!ADIP,IPR1.6	  (PIC18) 
	0 : low priority
	1 : high priority
!CCP2IF,PIR2.0	 (PIC18)  (INTS)
	0 : no TMR1 capture/compare match occurrred
	1 : TMR1 capture/compare match occurred
!CCP2IE,PIE2.0	  (PIC18) (INTS)
	0 : CCP2 interrupt disabled
	1 : CCP2 interrupt enabled
!CCP2IP,IPR2.0	  (PIC18) 
	0 : low priority
	1 : high priority
!CHS0,ADCON0.2:4  (PIC18) (A/D10BIT)
	0 : channel 0
	1 : channel 1
	2 : channel 2
	3 : channel 3
	4 : channel 4
	5 : channel 5
	6 : channel 6 
	7 : channel 7
	8 : channel 8
	9 : channel 9
  10 : channel 10
  11 : channel 11
  12 : reserved
  13 : reserved
  14 : reserved
  15 : reserved
!VCFG0,ADCON1.4:2  (PIC18) (A/D10BIT)
!PCFG0,ADCON1.0:4  (PIC18) (A/D10BIT)
	0: RA0 RA1 RA2 RA3 RA5 RE0 RE1 RE2 Ref=Vdd
	1: RA0 RA1 RA2 RA5 RE0 RE1 RE2 Ref=RA3
	2: RA0 RA1 RA2 RA3 RA5 Ref=Vdd
	3: RA0 RA1 RA2 RA5 Ref=RA3
	4: RA0 RA1 RA3 Ref=Vdd
	5: RA0 RA1 Ref=RA3
	6: None
	7: None
	8: RA0 RA1 RA5 RE0 RE1 RE2 Ref=RA2,RA3
	9: RA0 RA1 RA2 RA3 RA5 RE0 Ref=Vdd
	10: RA0 RA1 RA2 RA5 RE0 Ref=RA3
	11: RA0 RA1 RA5 RE0 Ref=RA2,RA3
	12: RA0 RA1 RA5 Ref=RA2,RA3
	13: RA0 RA1 Ref=RA2,RA3
	14: RA0
	15: RA0 Ref=RA2,RA3
!ADFM,ADCON2.7	  (PIC18) (A/D10BIT)
	0 : left justified
	1 : right justified
!ADCS2,ADCON2.0:3  (PIC18) (A/D10BIT) 
	0 : FOSC/2
	1 : FOSC/8
	2 : FOSC/32
	3 : FRC
	4 : FOSC/4
	5 : FOSC/16
	6 : FOSC/64
	7 : FRC
!ADCS2,ADCON1.6,ADCON0.6:2 (PIC18) (A/D10BITANSEL)
	0 : FOSC/2
	1 : FOSC/8
	2 : FOSC/32
	3 : FRC
	4 : FOSC/4
	5 : FOSC/16
	6 : FOSC/64
	7 : FRC
!CHS0,ADCON0.3:3 (PIC18) (A/D10BITANSEL)
	0 : channel 0 
	1 : channel 1
	2 : channel 2
	3 : channel 3
	4 : channel 4
	5 : channel 5
	6 : channel 6
	7 : channel 7
!GIE,INTCON.7	(INTS)
	0 : all interrupts disabled
	1 : all un-masked interrupts enabled
!PEIE,INTCON.6	 (PINTS)
	0 : all peripheral interrupts disabled
	1 : all peripheral interrupts enabled
#CCP
:INTCON,0B,C0	(PIC16)
:PIR1,0C,03	  	(PIC16)
:PIR2,0D,01	  	(PIC16) (CCP2)
:PIE1,8C,03	  	(PIC16) 
:PIE2,8D,01	  	(PIC16) (CCP2)
:TRISC,87,FF	(PIC16)
:TMR1L,0E,FF	(PIC16)
:TMR1H,0F,FF	(PIC16)
:T1CON,10,3F	(PIC16)
:CCPR1L,15,FF	(PIC16)
:CCPR1H,16,FF	(PIC16)
:CCP1CON,17,3F  	(PIC16)
:CCPR2L,1B,FF	(PIC16) (CCP2)
:CCPR2H,1C,FF	(PIC16) (CCP2)
:CCP2CON,1D,3F  	(PIC16) (CCP2)
:TMR2,11,FF	  	(PIC16) 
:PR2,92,FF		(PIC16)
:T2CON,12,7F	(PIC16)
:CMCON,1F,CF	(PIC16)
:INTCON,FF2,C0  	(PIC18)
:PIR1,F9E,04	(PIC18)
:PIE1,F9D,04	(PIC18)
:IPR1,F9F,04	(PIC18)
:TRISC,F94,FF	(PIC18)
:TMR1L,FCE,FF	(PIC18)
:TMR1H,FCF,FF	(PIC18)
:T1CON,FCD,BF	(PIC18)
:CCPR1L,FBE,FF  	(PIC18)
:CCPR1H,FBF,FF  	(PIC18)
:CCP1CON,FBD,3F 	(PIC18)
:CCPR2H,FBC,FF  	(PIC18)	(!PIC18F248)	(!PIC18F258)	(!PIC18F448)	(!PIC18F458)
:CCPR2L,FBB,FF  	(PIC18)	(!PIC18F248)	(!PIC18F258)	(!PIC18F448)	(!PIC18F458)
:CCP2CON,FBA,0F 	(PIC18)	(!PIC18F248)	(!PIC18F258)	(!PIC18F448)	(!PIC18F458)
:ECCPR1H,FBC,FF  	(18F248)
:ECCPR1L,FBB,FF  	(18F248)
:ECCP1CON,FBA,FF 	(18F248)
:ECCPR1H,FBC,FF  	(18F258)
:ECCPR1L,FBB,FF  	(18F258)
:ECCP1CON,FBA,FF 	(18F258)
:ECCPR1H,FBC,FF  	(18F448)
:ECCPR1L,FBB,FF  	(18F448)
:ECCP1CON,FBA,FF 	(18F448)
:ECCPR1H,FBC,FF  	(18F458)
:ECCPR1L,FBB,FF  	(18F458)
:ECCP1CON,FBA,FF 	(18F458)
:PIR2,FA1,03	(PIC18)
:PIE2,FA0,03	(PIC18)
:IPR2,FA2,03	(PIC18)
:TMR3L,FB2,FF	(PIC18)
:TMR3H,FB3,FF	(PIC18)
:T3CON,FB1,FF	(PIC18)
:TMR2,FCC,FF	(PIC18)
:PR2,FCB,FF	  	(PIC18)
:T2CON,FCA,7F	(PIC18)
:CMCON,FB4,FF	(PIC18)
:CCPR3H,FB9,FF	(PIC18)
:CCPR3L,FB8,FF	(PIC18)
:PWM1CON,FB7,FF	(PIC18)	(ECCP)
:ECCPAS,FB6,FF	(PIC18)	(ECCP)
:ECCPR1H,FBC,FF	(PIC18)	(ECCP)
:EECPR1L,FBB,FF	(PIC18)	(ECCP)
:EECP1DEL,FB7,FF	(PIC18)	(ECCP)
:EECP1CON,FBA,FF	(PIC18)	(ECCP)
:CCPR4H,F75,FF	(PIC18)	(ECCP)	(CC2)
:CCPR4L,F74,FF	(PIC18)	(ECCP)	(CC2)
:CCP4CON,F73,3F	(PIC18)	(ECCP)	(CC2)
:CCPR5H,F72,FF	(PIC18)	(ECCP)	(CC2)
:CCPR5L,F71,FF	(PIC18)	(ECCP)	(CC2)
:CCP5CON,F70,3F	(PIC18)	(ECCP)	(CC2)
!C2OUT,CMCON.7:1
	0 : C2 VIN+ < C2 VIN-
	1 : C2 VIN+ > C2 VIN-
!C1OUT,CMCON.6:1
	0 : C1 VIN+ < C1 VIN-
	1 : C1 VIN+ > C1 VIN-
!CIS,CMCON.3:1
	0 : C1 VIN- connects to RA0
	1 : C1 VIN- connects to RA3
!CmprtrMode,CMCON.0:3
	0 : Comparators Reset
	1 : Three Inputs Multiplexed to Two Comparators
	2 : Four Inputs Multiplexed to Two Comparators
	3 : Two Common Reference Comparators
	4 : Two Independent Comparators
	5 : One Independent Comparator
	6 : Two Common Reference Comparators with Outputs
	7 : Comparators Off
!TMR2IF,PIR1.1  (PIC16)  (INTS)
	0 : no TMR2 to PR2 match occurred
	1 : TMR2 to PR2 match occurred
!TMR1IF,PIR1.0  (PIC16)  (INTS)
	0 : TMR1 register did not overflow
	1 : TMR1 register did overflow
!CCP2IF,PIR2.0  (INTS) (CCP2)
	0 : no TMR1 capture/compare match occurrred
	1 : TMR1 capture/compare match occurred
!TMR2IE,PIE1.1  (PIC16)  (INTS)
	0 : TMR2 to PR2 match interrupt disabled
	1 : TMR2 to PR2 match interrupt enabled
!TMR1IE,PIE1.0  (PIC16)  (INTS)
	0 : TMR1 overflow interrupt disabled
	1 : TMR1 overflow interrupt enabled
!CCP2IE,PIE2.0  (INTS) (CCP2)
	0 : CCP2 interrupt disabled
	1 : CCP2 interrupt enabled
!CCP1IE,PIE2.2	(INTS)
	0 : CCP2 interrupt disabled
	1 : CCP2 interrupt enabled
!CCP1IF,PIR2.2	(INTS)
	0 : no TMR1 capture/compare match occurrred
	1 : TMR1 capture/compare match occurred
!T1CKPS0,T1CON.4:2
	0 : Divide by 1
	1 : Divide by 2
	2 : Divide by 4
	3 : Divide by 8
!T1OSCEN,T1CON.3
	0 : TIMER1 oscillator disabled
	1 : TIMER1 oscillator enabled
!T1SYNC,T1CON.2
	0 : external clock input sychronized
	1 : external clock input not synchronized
!TMR1CS,T1CON.1
	0 : internal clock
	1 : external clock from pin T1CKI
!TMR1ON,T1CON.0
	0 : TIMER1 disabled
	1 : TIMER1 enabled
!CCP1X,CCP1CON.5	(PIC16)
	0: First LSB of PWM duty cycle
	1: First LSB of PWM duty cycle 
!CCP1Y,CCP1CON.4	(PIC16)
	0: Second LSB of PWM duty cycle
	1: Second LSB of PWM duty cycle 
!CCP1M0,CCP1CON.0:4  (PIC16)
	0 : capture/compare/PWM disabled
	4 : capture mode, every falling edge
	5 : capture mode, every rising edge
	6 : capture mode, every 4th rising edge
	7 : capture mode, every 16th rising edge
	8 : compare mode, set output on match
	9 : compare mode, clear output on match
  10 : compare mode, generate interrupt on match
  11 : compare mode, trigger special event
  12 : PWM mode
  13 : PWM mode
  14 : PWM mode
  15 : PWM mode
!CCP2X,CCP2CON.5  (PIC16) (CCP2)
	0: First LSB of PWM duty cycle
	1: First LSB of PWM duty cycle 
!CCP2Y,CCP2CON.4  (PIC16) (CCP2)
	0: Second LSB of PWM duty cycle
	1: Second LSB of PWM duty cycle 
!CCP2M0,CCP2CON.0:4	(PIC16) (CCP2)
	0 : capture/compare/PWM disabled
	4 : capture mode, every falling edge
	5 : capture mode, every rising edge
	6 : capture mode, every 4th rising edge
	7 : capture mode, every 16th rising edge
	8 : compare mode, set output on match
	9 : compare mode, clear output on match
  10 : compare mode, generate interrupt on match
  11 : compare mode, trigger special event
  12 : PWM mode
  13 : PWM mode
  14 : PWM mode
  15 : PWM mode
!TOUTPS0,T2CON.3:4
	0 : Divide by 1
	1 : Divide by 2
	2 : Divide by 3
	3 : Divide by 4
	4 : Divide by 5
	5 : Divide by 6
	6 : Divide by 7
	7 : Divide by 8
	8 : Divide by 9
	9 : Divide by 10
  10 : Divide by 11
  11 : Divide by 12
  12 : Divide by 13
  13 : Divide by 14
  14 : Divide by 15
  15 : Divide by 16
!TMR2ON,T2CON.2
	0 : TIMER2 disabled
	1 : TIMER2 enabled
!T2CKPS0,T2CON.0:2
	0 : prescaler is 1
	1 : prescaler is 4
	2 : prescaler is 16
	3 : prescaler is 16
!CCP1IF,PIR1.2  	(PIC18)  (INTS)
	0 : no TMR1 capture/compare match occurred
	1 : TMR1 capture/compare match occurred
!CCP1IE,PIE1.2  	(PIC18)  (INTS)
	0 : CCP1 interrupt disabled
	1 : CCP1 interrupt enabled
!CCP1IP,IPR1.2  	(PIC18)
	0 : low priority
	1 : high priority
!TMR3IF,PIR2.1  	(PIC18)  (INTS)
	0 : TMR3 did not overflow
	1 : TMR3 overflowed
!TMR3IE,PIE2.1  	(PIC18)	(INTS)
	0 : TMR3 overflow interrupt disabled
	1 : TMR3 overflow interrupt enabled
!TMR3IP,IPR2.1  	(PIC18)
	0 : low priority
	1 : high priority
!RD16,T1CON.7	(PIC18)
	0 : read/write of TIMER1 two 8-bit operations
	1 : read/write of TIMER1 one 16-bit operation
!DC1B0,CCP1CON.4:2  	(PIC18)
!CCP1M0,CCP1CON.0:4  	(PIC18)
	0 : capture/compare/PWM disabled
	1 : reserved										
	2 : compare mode, toggle output on match  
	3 : reserved	 					
	4 : capture mode, every falling edge
	5 : capture mode, every rising edge
	6 : capture mode, every 4th rising edge
	7 : capture mode, every 16th rising edge
	8 : compare mode, initialize CCP pin low
	9 : compare mode, initialize CCP pin high
  10 : compare mode, generate interrupt on match
  11 : compare mode, trigger special event
  12 : PWM mode
  13 : PWM mode
  14 : PWM mode
  15 : PWM mode
!CCP2M0,CCP2CON.0:4  	(PIC18)
	0 : capture/compare/PWM disabled
	1 : reserved										
	2 : compare mode, toggle output on match  
	3 : reserved	 					
	4 : capture mode, every falling edge
	5 : capture mode, every rising edge
	6 : capture mode, every 4th rising edge
	7 : capture mode, every 16th rising edge
	8 : compare mode, initialize CCP pin low
	9 : compare mode, initialize CCP pin high
  10 : compare mode, generate interrupt on match
  11 : compare mode, trigger special event
  12 : PWM mode
  13 : PWM mode
  14 : PWM mode
  15 : PWM mode
!RDI6,T3CON.7	  	(PIC18)
	0 : read/write of TIMER1 two 8-bit operations
	1 : read/write of TIMER1 one 16-bit operation
!T3CCP1,T3CON.3, T3CON.6  (PIC18)
	0 : TIMER1 clock source for compare/capture CCP
	1 : TIMER3 clock source for compare/capture CCP2
	2 : TIMER3 clock source for compare/capture CCP
	3 : TIMER3 clock source for compare/capture CCP
!T3CKPS0,T3CON.4:2 (PIC18)
	0 : Divide by 1
	1 : Divide by 2
	2 : Divide by 4
	3 : Divide by 8
!T3SYNC,T3CON.1:2  (PIC18)
	0 : internal clock
	1 : external clock input sychronized
	2 : internal clock
	3 : external clock input not synchronized
!TMR3ON,T3CON.0	(PIC18)
	0 : TIMER3 disabled
	1 : TIMER3 enabled
!GIE,INTCON.7	(INTS)
	0 : all interrupts disabled
	1 : all un-masked interrupts enabled
!PEIE,INTCON.6	 (PINTS)
	0 : all peripheral interrupts disabled
	1 : all peripheral interrupts enabled
!PRSEN,PWM1CON.7		(PIC18)	(ECCP)
	1 : ECCPASE cleared after shutdown event, PWM restarted
	0 : ECCPASE must be cleared in software
!ECCPASE,EECPAS.7		(PIC18)	(ECCP)
	0 : ECCP outputs are operating
	1 : A shutdown event has occurred; ECCP outputs are in shutdown state
!ECCPAS,EECPAS.4:2	(PIC18)	(ECCP)
	0 : Auto shutdown is disabled
	1 : Comparator 1 output
	2 : Comparator 2 output
	3 : Either Comparator 1 or 2
	4 : INT0
	5 : INT0 or Comparator 1
	6 : INT0 or Comparator 2
	7 : INT0 or Comparator 1 or Comparator 2
!PASSACn,EECPAS.2:1	(PIC18)	(ECCP)
	0 : Drive Pins A anc C to '0'
	1 : Drive Pins A and C to '1'
	2 : Pins A and C tri-state
	3 : Pins A and C tri-state
!PSSBDn,EECPAS.0:1	(PIC18)	(ECCP)
	0 : Drive Pins B and D to '0'
	1 : Drive Pins B and D to '1'
	2 : Pins B and D tri-state
	3 : Pins B and D tri-state
!EPWM1M,EECP1CON.6:1	(PIC18)	(ECCP)
	0 : Single output; P1A modulated; P1B, P1C, P1D assigned as port pins
	1 : Full-bridge output forward; 1d modulated; P1A active; P1B, P1C inactive
	2 : Half-bridge output; P1A, P1B modulated with deadband control; P1C, P1D assignes as port pins
	3 : Full-bridge output reverse; P1B modulated; P1C active; P1A, P1D inactive
!ECCP1M,EECP1CON.0:3	(PIC18)	(ECCP)
	0  : CCPWM off (resets ECCP module)
	1  : Unused
	2  : Compare mode, toggle outpu on match (ECCP1IF bit is set)
	3  : Unused
	4  : Capture mode, every falling edge
	5  : Capture mode, every rising edge
	6  : Capture mode, every 4th rising edge
	7  : Capture mode, every 16th rising edge
	8  : Compare mode, set output on match (ECCP1IF bit is set)
	9  : Compare mode, clear output on match (ECCP1IF bit is set)
	10 : Compare mode, ECCP1 pin is unaffected (ECCP1IF bit is set)
	11 : Compare mode, triggers special event (ECCP1IF bit is set; ECCP resets TMR1 or TMR3 & starts A/D conversion if enabled)
	12 : PWM mode; P1A, P1C active high; P1B, P1D active high
	13 : PWM mode; P1A, P1C active high; P1B, P1D active low
	14 : PWM mode; P1A, P1C active low; P1B, P1D active high
	15 : PWM mode; P1A, P1C active low; P1B, P1D active low
#PSP
:PORTD,08,FF	(PIC16)
:PORTE,09,07	(PIC16)
:TRISE,89,F7	(PIC16)
:PIR1,0C,80	 	(PIC16)
:PIE1,8C,80	 	(PIC16)
:ADCON1,9F,07  	(PIC16)
:PCON,8E,3	  	(PIC16)
:PORTD,F83,FF  	(PIC18)
:LATD,F8C,FF	(PIC18)
:TRISD,F95,FF  	(PIC18)
:PORTE,F84,07  	(PIC18)
:LATE,F8D,07	(PIC18)
:TRISE,F96,F7  	(PIC18)
:INTCON,FF2,C0 	(PIC18)
:PIR1,F9E,80	(PIC18)
:PIE1,F9D,80	(PIC18)
:IPR1,F9F,80	(PIC18)
:ADCON1,FC1,80 	(PIC18)
!IBF,TRISE.7	  
	0 : no word received
	1 : word received
!OBF,TRISE.6	  
	0 : output buffer read
	1 : output buffer not read
!IBOV,TRISE.5	 
	0 : no overflow
	1 : overflow
!PSPMODE,TRISE.4  
	0 : general purpose I/O mode
	1 : parallel slave port mode
!TRISE0,TRISE.0:3  
	0 : output
	1 : input
!PSPIF,PIR1.7	 
	0 : no read/write occurred
	1 : read/write occurred
!PSPIE,PIE1.7		(INTS)
	0 : PSP read/write interrupt disabled
	1 : PSP read/write interrupt enabled
!RE0 ,PORTE.0
	0: Read Operation. Reads PORTD register
	1: Not a read operation
!RE1 ,PORTE.1
	0: Write Operation. Writes PORTD register
	1: Not a read operation
!RE2 ,PORTE.2
	0: Device is selected
	1: Device is not selected
!PSPIP,IPR1.7	  (PIC18)
	0 : low priority
	1 : high priority
!PCFG0,ADCON1.0:4
	0: RA0 RA1 RA2 RA3 RA5 RE0 RE1 RE2 Ref=Vdd
	1: RA0 RA1 RA2 RA5 RE0 RE1 RE2 Ref=RA3
	2: RA0 RA1 RA2 RA3 RA5 Ref=Vdd
	3: RA0 RA1 RA2 RA5 Ref=RA3
	4: RA0 RA1 RA3 Ref=Vdd
	5: RA0 RA1 Ref=RA3
	6: None
	7: None
	8: RA0 RA1 RA5 RE0 RE1 RE2 Ref=RA2,RA3
	9: RA0 RA1 RA2 RA3 RA5 RE0 Ref=Vdd
	10: RA0 RA1 RA2 RA5 RE0 Ref=RA3
	11: RA0 RA1 RA5 RE0 Ref=RA2,RA3
	12: RA0 RA1 RA5 Ref=RA2,RA3
	13: RA0 RA1 Ref=RA2,RA3
	14: RA0
	15: RA0 Ref=RA2,RA3 
!GIE,INTCON.7	 (PIC18)  (INTS)
	0 : all interrupts disabled
	1 : all un-masked interrupts enabled
!PEIE,INTCON.6	 (PIC18) (PINTS)
	0 : all peripheral interrupts disabled
	1 : all peripheral interrupts enabled
!POR,PCON.0	(PIC16)
	0 : A Power-on Reset occurred
	1 : No Power-on Reset occurred
!BOR,PCON.1
	0 : A Brown-out Reset occurred
	1 : No Brown-out Reset occurred
#SPI
:INTCON,0B,C0	(PIC16)
:PIR1,0C,08	  	(PIC16)
:PIE1,8C,08	  	(PIC16)
:SSPBUF,13,FF	(PIC16)
:SSPCON,14,FF	(PIC16)
:SSPSTAT,94,C1  	(PIC16)
:SSPCON2,91,FF	(PIC16)
:SSPADD,93,FF	(PIC16)
:INTCON,FF2,CO  	(PIC18)
:PIR1,F9E,08	(PIC18)
:PIE1,F9D,08	(PIC18)
:IPR1,F9F,08	(PIC18)
:TRISC,F94,FF	(PIC18)
:SSPBUF,FC9,FF  	(PIC18)
:SSPCON,FC6,FF  	(PIC18)
:TRISA,F92,7F	(PIC18)
:SSPSTAT,FC7,C0 	(PIC18)
!SSPIF,PIR1.3	(PIC16)
	0 : no SSP interrupt occurred
	1 : SSP interrupt occurred
!SSPIE,PIE1.3	(PIC16)
	0 : SSP interrupt disabled
	1 : SSP interrupt enabled
!SSPIF,PIR1.3	(PIC18)
	0 : waiting to transmit/receive
	1 : transmission/reception complete
!SSPIE,PIE1.3	(PIC18)
	0 : MSSP interrupt disabled
	1 : MSSP interrupt enabled
!WCOL,SSPCON.7
	0 : no collision
	1 : collision
!SSPOV,SSPCON.6
	0 : no overflow
	1 : overflow
!SSPEN,SSPCON.5
	0 : serial port disabled
	1 : serial port enabled
!CKP,SSPCON.4
	0: Idle state for clock at low level
	1: Idle state for clock at high level
!SSPM0,SSPCON.0:4
	0 : SPI master mode, clk=FOSC/4
	1 : SPI master mode, clk=FOSC/16
	2 : SPI master mode, clk=FOSC/64
	3 : SPI master mode, clk=TMR2 output/2
	4 : SPI slave mode, clk=SCK, SS enabled
	5 : SPI slave mode, clk=SCK, SS disabled
	6 : I2C slave mode, 7-bit address
	7 : I2C slave mode, 10-bit address
	8 : I2C master mode, clk=FOSC/(4*(SSPADD+1))
	9 : reserved  
  10 : reserved  
  11 : I2C firmware controlled by master mode
  12 : reserved  
  13 : reserved  
  14 : I2C slave mode, 7-bit address, START/STOP enabled
  15 : I2C slave mode, 10-bit address, START/STOP enabled
!SMP,SSPSTAT.7
	0 : input sampled at middle of output time
	1 : input sampled at end of output time
!CKE,SSPSTAT.6,SSPCON.4
	0 : data transmitted falling edge 
	1 : data transmitted rising edge
	2 : data transmitted rising edge
	3 : data transmitted falling edge
!BF,SSPSTAT.0
	0 : SSPBUF empty
	1 : SSPBUF full
!SSPIP,IPR1.3	 (PIC18)
	0 : low priority
	1 : high priority
!GIE,INTCON.7	 (PIC18)  (INTS)
	0 : all interrupts disabled
	1 : all un-masked interrupts enabled
!PEIE,INTCON.6	 (PIC18) (PINTS)
	0 : all peripheral interrupts disabled
	1 : all peripheral interrupts enabled
!GCEN,SSPCON2.7	(PIC16)
	0 : General call address disabled
	1 : Enable interrupt when a general call address (0000h) is received in the SSPSR
!ACKSTAT,SSPCON2.6 (PIC16)
	0 : Acknowledge was received from slave
	1 : Acknowledge was not received from slave
!ACKDT,SSPCON2.5 (PIC16)
	0 : Acknowledge
	1 : Not Acknowledge
!ACKEN,SSPCON2.4 (PIC16)
	0 : Acknowledge sequence idle
	1 : Initiate Acknowledge sequence on SDA and SCL pins and transmit ACKDT data bit
!RCEN,SSPCON2.3 (PIC16)
	0 : Receive idle
	1 : Enables Receive mode for I2C
!PEN,SSPCON2.2 (PIC16)
	0 : STOP condition idle
	1 : Initiate STOP condition on SDA and SCL pins. Automatically cleared by hardware
!RSEN,SSPCON2.1 (PIC16)
	0 : Repeated START condition idle
	1 : Initiate Repeated START condition on SDA and SCL pins
!SEN,SSPCON2.0 (PIC16)
	0 : START condition idle
	1 : Initiate START condition on SDA and SCL pins
#TIMER0
:TMR0,01,FF			(PIC16) 
:INTCON,0B,E4		(PIC16)
:OPTION_REG,81,38  	(PIC16)
:TRISA,85,EF		(PIC16)
:INTCON,FF2,E4	  	(PIC18)
:TMR0H,FD7,FF		(PIC18)
:TMR0L,FD6,FF		(PIC18)
:T0CON,FD5,FF		(PIC18)
:TRISA,F92,7F		(PIC18)
!T0IE,INTCON.5	 (INTS)
	0 : TMR0 interrupt disabled
	1 : TMR0 interrupt enabled
!T0IF,INTCON.2	 (INTS)
	0 : TMR0 register did not overflow
	1 : TMR0 register did overflow
!T0SE,OPTION_REG.4  (PIC16)
	0 : inc on T0CKI pin low-to-high
	1 : inc on T0CKI pin high-to-low
!T0CS,OPTION_REG.4  (PIC16)
	0 : internal instruction cycle clock
	1 : transition on T0CK1 pin
!T0SE,T0CON.4:2	 (PIC18)
	0 : internal instruction cycle clock
	1 : internal instruction cycle clock
	2 : inc on T0CKI pin low-to-high
	3 : inc on T0CKI pin high-to-low
!PSA,OPTION_REG.3
	0 : prescaler assigned to TIMER0 module
	1 : prescaler assigned to WDT
!PSA,T0CON.3	 (PIC18)
	0 : TIMER0 prescaler assigned 
	1 : No TIMER0 prescaler assigned 
!PS2,OPTION_REG.0:3  (PIC16)
	0 : Divide by 2
	1 : Divide by 4
	2 : Divide by 8
	3 : Divide by 16
	4 : Divide by 32
	5 : Divide by 64
	6 : Divide by 128
	7 : Divide by 256 
!T0PS2,T0CON.0:3	 (PIC18)
	0 : Divide by 2
	1 : Divide by 4
	2 : Divide by 8
	3 : Divide by 16
	4 : Divide by 32
	5 : Divide by 64
	6 : Divide by 128
	7 : Divide by 256 
!TRISA4,TRISA.4	 
	0 : Pin A4 is an Output
	1 : Pin A4 is an Input  
!TMR0ON,T0CON.7	 (PIC18)
	0 : TIMER0 disabled
	1 : TIMER0 enabled
!T08BIT,T0CON.6	 (PIC18)
	0 : TIMER0 16-bit timer/counter
	1 : TIMER0 8-bit timer/counter
!GIE,INTCON.7	 (INTS)
	0 : all interrupts disabled
	1 : all un-masked interrupts enabled
!PEIE,INTCON.6	 (PINTS)
	0 : all peripheral interrupts disabled
	1 : all interrupts enabled
#TIMER1
:INTCON,0B,C0  (PIC16)
:PIR1,0C,01	 (PIC16)
:PIE1,8C,01	 (PIC16)
:T1CON,10,3F	(PIC16)
:TMR1L,0E,FF	(PIC16)
:TMR1H,0F,FF	(PIC16)
:INTCON,FF2,C0 (PIC18)
:PIR1,F9E,01	(PIC18)
:PIE1,F9D,01	(PIC18)
:1PR1,F9F,01	(PIC18)
:T1CON,FCA,BF  (PIC18)
!TMR1IF,PIR1.0	 (INTS)
	0 : TMR1 register did not overflow
	1 : TMR1 register did overflow
!TMR1IE,PIE1.0	 (INTS)
	0 : TMR1 overflow interrupt disabled
	1 : TMR1 overflow interrupt enabled
!T1CKPS0,T1CON.4:2
	0 : Divide by 1
	1 : Divide by 2
	2 : Divide by 4
	3 : Divide by 8
!T1OSCEN,T1CON.3
	0 : TIMER1 oscillator disabled
	1 : TIMER1 oscillator enabled
!T1SYNC,T1CON.2
	0 : external clock input sychronized
	1 : external clock input not synchronized
!TMR1CS,T1CON.1
	0 : internal clock
	1 : external clock from pin T1CKI
!TMR1ON,T1CON.0
	0 : TIMER1 disabled
	1 : TIMER1 enabled
!TMR1IP,IPR1.0	 (PIC18)
	0 : low priority
	1 : high priority
!RDI6,T1CON.7	  (PIC18)
	0 : read/write of TIMER1 two 8-bit operations
	1 : read/write of TIMER1 one 16-bit operation
!GIE,INTCON.7	 (INTS)
	0 : all interrupts disabled
	1 : all un-masked interrupts enabled
!PEIE,INTCON.6	 (PINTS)
	0 : all peripheral interrupts disabled
	1 : all peripheral interrupts enabled
#TIMER2
:INTCON,0B,C0  (PIC16)
:PIR1,0C,02	 (PIC16)
:PIE1,8C,02	 (PIC16)
:TMR2,11,FF	 (PIC16)
:T2CON,12,7F	(PIC16)
:PR2,92,FF	  (PIC16)
:INTCON,FF2,C0 (PIC18)
:PIR1,F9E,01	(PIC18)
:PIE1,F9D,01	(PIC18)
:1PR1,F9F,01	(PIC18)
:T2CON,FCA,7F  (PIC18)
!TMR2IF,PIR1.1	 (INTS)
	0 : no TMR2 to PR2 match occurred
	1 : TMR2 to PR2 match occurred
!TMR2IE,PIE1.1	 (INTS)
	0 : TMR2 to PR2 match interrupt disabled
	1 : TMR2 to PR2 match interrupt enabled
!TOUTPS3,T2CON.3:4
	0 : Divide by 1
	1 : Divide by 2
	2 : Divide by 3
	3 : Divide by 4
	4 : Divide by 5
	5 : Divide by 6
	6 : Divide by 7
	7 : Divide by 8
	8 : Divide by 9
	9 : Divide by 10 
  10 : Divide by 11
  11 : Divide by 12
  12 : Divide by 13 
  13 : Divide by 14
  14 : Divide by 15
  15 : Divide by 16
!TMR2ON,T2CON.2
	0 : TIMER2 disabled
	1 : TIMER2 enabled
!T2CKPS1,T2CON.0:2
	0 : prescaler is 1
	1 : prescaler is 4
	2 : prescaler is 16
	3 : prescaler is 16
!TMR2IP,IPR1.1	(PIC18)
	0 : low priority
	1 : high priority
!GIE,INTCON.7	 (INTS)
	0 : all interrupts disabled
	1 : all un-masked interrupts enabled
!PEIE,INTCON.6	 (PINTS)
	0 : all peripheral interrupts disabled
	1 : all peripheral interrupts enabled
#TIMER3
:INTCON,FF2,C0	(PIC18)
:PIR2,FA1,02	(PIC18)
:PIE2,FA0,02	(PIC18)
:IPR2,FA2,02	(PIC18)
:T1CON,FCD,08	(PIC18)
:T3CON,FB1,FF	(PIC18)
!TMR3IF,PIR2.1  	(PIC18)
	0 : TMR3 register no overflow
	1 : TMR3 register overflow
!TMR3IE,PIE2.1	(PIC18) (INTS)
	0 : TMR3 overflow int disabled
	1 : TMR3 overflow int enabled
!TMR3IP,IPR2.1	(PIC18)
	0 : low priority
	1 : high priority
!T1OSCEN,T1CON.3 (PIC18)
	0 : TIMER1 oscillator disabled
	1 : TIMER1 oscillator enabled
!RDI6,T3CON.7	  (PIC18)
	0 : read/write of TIMER1 two 8-bit operations
	1 : read/write of TIMER1 one 16-bit operation
!T3CCP1,T3CON.3, T3CON.6  (PIC18)
	0 : TIMER1 clock source for compare/capture CCP
	1 : TIMER3 clock source for compare/capture CCP2
	2 : TIMER3 clock source for compare/capture CCP
	3 : TIMER3 clock source for compare/capture CCP
!T3CKPS0,T3CON.4:2 (PIC18)
	0 : Divide by 1
	1 : Divide by 2
	2 : Divide by 4
	3 : Divide by 8
!T3SYNC,T3CON.1:2  (PIC18)
	0 : internal clock
	1 : external clock input sychronized
	2 : internal clock
	3 : external clock input not synchronized
!TMR3ON,T3CON.0	(PIC18)
	0 : TIMER3 disabled
	1 : TIMER3 enabled
!GIE,INTCON.7	  (PIC18) (INTS)
	0 : all interrupts disabled
	1 : all un-masked interrupts enabled
!PEIE,INTCON.6	 (PIC18) (PINTS)
	0 : all peripheral interrupts disabled
	1 : all peripheral interrupts enabled
#USART
:INTCON,0B,C0	(PIC16)
:PIR1,0C,30	  	(PIC16)
:RCSTA,18,F7	(PIC16)
:TXREG,19,FF	(PIC16)
:PIE1,8C,30	  	(PIC16)
:TXSTA,98,F7	(PIC16)
:SPBRG,99,FF	(PIC16)
:RCREG,1A,FF	(PIC16)
:INTCON,FF2,C0  	(PIC18)
:PIR1,F9E,30	(PIC18)
:PIE1,F9D,30	(PIC18)
:IPR1,F9F,30	(PIC18)
:TXSTA,FAC,FF	(PIC18)
:RCSTA,FAB,FF	(PIC18)
:TXREG,FAD,FF	(PIC18)
:SPBRG,FAF,FF	(PIC18)
:RCREG,FAE,FF	(PIC18)
:BAUDCTL,FAA,5B	(PIC18)	(!PIC18f6620)	(!PIC18f6720)	(!PIC18f8620)	(!PIC18f8720)
:EEADRH,FAA,03	(18F6620)	
:EEADRH,FAA,03	(18F6720)
:EEADRH,FAA,03	(18F8720)
:EEADRH,FAA,03	(18F8620)
:SPBRG2,F6F,FF	(PIC18)
:RCREG2,F6E,FF	(PIC18)
:TXREG2,F6D,FF	(PIC18)
:TXSTA2,F6C,F7	(PIC18)
:RCSTA2,F6B,FF	(PIC18)
!RCIF,PIR1.5	 (INTS)
	0 : USART receive buffer empty
	1 : USART receive buffer full
!TXIF,PIR1.4	 (INTS)
	0 : USART transmit buffer full
	1 : USART transmit buffer empty
!RCIE,PIE1.5	 (INTS)
	0 : USART receive interrupt disabled
	1 : USART receive interrupt enabled
!TXIE,PIE1.4	 (INTS)
	0 : USART transmit interrupt disabled
	1 : USART transmit interrupt enabled
!RCIP,IPR1.5	  (PIC18)
	0 : low priority
	1 : high priority
!TXIP,IPR1.4	  (PIC18)
	0 : low priority
	1 : high priority
!SPEN,RCSTA.7 
	0 : serial port disabled
	1 : serial port enabled
!RX9,RCSTA.6,RCSTA.0
	0 : 8-bit reception
	1 : 8-bit reception
	2:  9-bit reception,9 th bit 0 
	3:  9-bit reception, 9th bit 1
!SREN,RCSTA.5
	0 : single receive disabled
	1 : single receive enabled
!CREN,RCSTA.4
	0 : continuous receive disabled
	1 : continuous receive enabled
!ADDEN,RCSTA.3
	0 : Disables address detection
	1 : Enables address detection
!FERR,RCSTA.2
	0 : no framing error
	1 : framing error
!OERR,RCSTA.1
	0 : no overrun error
	1 : overrun error
!CSRC,TXSTA.7
	0 : slave mode
	1 : master mode
!TX9,TXSTA.6,TXSTA.0
	0 : 8-bit transmission
	1 : 8-bit transmission
	2:  9-bit transmission,9 th bit 0 
	3:  9-bit transmission, 9th bit 1
!TXEN,TXSTA.5
	0 : transmit disabled 
	1 : transmit enabled
!SYNC,TXSTA.4
	0 : asynchronous mode
	1 : synchronous mode
!BRGH,TXSTA.2
	0 : low speed
	1 : high speed
!TRMT,TXSTA.1
	0 : TSR full
	1 : TSR empty
!GIE,INTCON.7	(INTS)
	0 : all interrupts disabled
	1 : all un-masked interrupts enabled
!PEIE,INTCON.6	 (PINTS)
	0 : all peripheral interrupts disabled
	1 : all peripheral interrupts enabled
!RCIDL,BAUDCTL,6	(PIC18)
	1 : Receive operation is IDLE
	0 : Receive operation is active
!SCKP,BAUDCTL,4	(PIC18)
	1 : IDLE state for clock (CK) is a high level
	0 : IDLE state for clock (CK) is a low level
!BRG16,BAUDCTL,3	(PIC18)
	1 : 16-bit baud rate generator - SPBRGH and SPBRG
	0 : 8-bit baud rate generator - SPBRG only (Compatible mode), SPBRGH value ignored
!WUE,BAUDCTL,1	(PIC18)
	1 : USART will continue to sample the RX pin - interrupt generated on falling edge; bit cleared in hardware on following rising edge
	0 : RX pin not monitored or rising edge detected
!ABDEN,BAUDCTL,0	(PIC18)
	1 : Enable baud rate measurement on the next character -
	0 : Baud rate measurement disabled or completed
#USB
:PIR1,0C,FF	(PIC16)
:UIR,190,3F	(PIC16)
:UIE,191,3F	(PIC16)
:UEIR,192,FF	(PIC16)
:UEIE,193,FF	(PIC16)
:USTAT,194,1C	(PIC16)
:UCTRL,195,3E	(PIC16)
:UADDR,196,7F	(PIC16)
:USWSTAT,197,FF	(PIC16)
:UEP0,198,0F	(PIC16)
:UEP1,199,0F	(PIC16)
:UEP2,19A,0F	(PIC16)
:BD0OST,1A0,FC	(PIC16)
:BD0OBC,1A1,0F	(PIC16)
:BD0OAL,1A2,FF	(PIC16)
:BD0IST,1A4,FC	(PIC16)
:BD0IBC,1A5,0F	(PIC16)
:BD0IAL,1A6,FF	(PIC16)
:BD1OST,1A8,FC	(PIC16)
:BD1OBC,1A9,0F	(PIC16)
:BD1OAL,1AA,FF	(PIC16)
:BD1IST,1AC,FC	(PIC16)
:BD1IBC,1AD,0F	(PIC16)
:BD1IAL,1AE,FF	(PIC16)
:BD2OST,1B0,FC	(PIC16)
:BD2OBC,1B1,0F	(PIC16)
:BD2OAL,1B2,FF	(PIC16)
:BD2IST,1B4,FC	(PIC16)
:BD2IBC,1B5,0F	(PIC16)
:BD2IAL,1B6,FF	(PIC16)
:40_byte_USB_Buffer,1B8,FFFFFFFFFF	(PIC16)
!USBIF,PIR1.3	(PIC16)
	1 : A USB interrupt condition has occurred
	0 : No USB interrupt conditions have occurred
!STALL,UIR.5	(PIC16)
	1 : A STALL handshake was sent by SIE
	0 : No STALL handshake sent by SIE
!UIDLE,UIR.4	(PIC16)
	1 : A constant idle on USB for 3ms detected
	0 : No constant idle on USB detected
!TOK_DNE,UIR.3	(PIC16)
	1 : Current token being processed is complete
	0 : Current token being processed is not complete
!ACTIVITY,UIR.2	(PIC16)
	1 : Activity on the D+/D- lines
	0 : No activity on the D+/D- lines
!UERR,UIR.1	(PIC16)
	1 : An error condition within the ERR_STAT has occrred
	0 : No error condition within the ERR_STAT occurred
!USB_RST,UIR.0	(PIC16)
	1 : A valid USB reset was decoded
	0 : A valid USB reset not was decoded
!STALL,UIE.5	(PIC16)
	1 : A STALL handshake was sent by SIE
	0 : No STALL handshake sent by SIE
!UIDLE,UIE.4	(PIC16)
	1 : A constant idle on USB for 3ms detected
	0 : No constant idle on USB detected
!TOK_DNE,UIE.3	(PIC16)
	1 : Current token being processed is complete
	0 : Current token being processed is not complete
!ACTIVITY,UIE.2	(PIC16)
	1 : Activity on the D+/D- lines
	0 : No activity on the D+/D- lines
!UERR,UIE.1	(PIC16)
	1 : An error condition within the ERR_STAT has occurred
	0 : No error condition within the ERR_STAT occurred
!USB_RST,UIE.0	(PIC16)
	1 : A valid USB reset was decoded
	0 : A valid USB reset not was decoded
!BTS_ERR,UEIR.7	(PIC16)
	1 : A bit stuff error has been detected
	0 : No bit stuff error detected
!OWN_ERR,UEIR.6	(PIC16)
	1 : Microprocessor owns BDT and SIE does not have access to the BDT
	0 : Microprocessor may own BDT and SIE may have access to the BDT
!WRT_ERR,UEIR.5	(PIC16)
	1 : A write by the MCU to the USB buffer area was unsuccessful
	0 : A write by the MCU to the USB buffer area may have been successful
!BTO_ERR,UEIR.4	(PIC16)
	1 : A bus turnaround time-out error occurred
	0 : A bus turnaround time-out error did not occurr
!DFN8,UEIR.3	(PIC16)
	1 : The data field recieved was not 8 bits
	0 : The data field recieved may have been 8 bits
!CRC16,UEIR.2	(PIC16)
	1 : The CRC16 failed
	0 : The CRC16 may not have failed
!CRC5,UEIR.1	(PIC16)
	1 : The token packet was rejected due to a CRC5 error
	0 : The token packet may not have been rejected due to a CRC5 error
!PID_ERR,UEIR.0	(PIC16)
	1 : The PID check field failed
	0 : The PID check field my not have failed
!BTS_ERR,UEIE.7	(PIC16)
	1 : A bit stuff error has been detected
	0 : No bit stuff error detected
!OWN_ERR,UEIE.6	(PIC16)
	1 : Microprocessor owns BDT and SIE does not have access to the BDT
	0 : Microprocessor may own BDT and SIE may have access to the BDT
!WRT_ERR,UEIE.5	(PIC16)
	1 : A write by the MCU to the USB buffer area was unsuccessful
	0 : A write by the MCU to the USB buffer area may have been successful
!BTO_ERR,UEIE.4	(PIC16)
	1 : A bus turnaround time-out error occurred
	0 : A bus turnaround time-out error did not occurr
!DFN8,UEIE.3	(PIC16)
	1 : The data field recieved was not 8 bits
	0 : The data field recieved may have been 8 bits
!CRC16,UEIE.2	(PIC16)
	1 : The CRC16 failed
	0 : The CRC16 may not have failed
!CRC5,UEIE.1	(PIC16)
	1 : The token packet was rejected due to a CRC5 error
	0 : The token packet may not have been rejected due to a CRC5 error
!PID_ERR,UEIE.0	(PIC16)
	1 : The PID check field failed
	0 : The PID check field my not have failed
!IN,USTAT.2	(PIC16)
	1 : The last transaction was an IN TOKEN
	0 : The last transaction was an OUT or SLEEP TOKEN
!SE0,UCTRL.5	(PIC16)
	1 : Single ended zero being received
	0 : Single ended zero not being received
!PKT_DIS,UCTRL.4	(PIC16)
	1 : Set by SIE when a setup Token is received
	0 : SIE may continue token processing
!DEV_ATT,UCTRL.3	(PIC16)
	1 : Vusb driven with 3.3V
	0 : Vusb (D-/D+) are high impedance
!RESUME,UCTRL.2	(PIC16)
	1 : Perform RESUME signaling
	0 : Normal operation
!SUSPEND,UCTRL.1	(PIC16)
	1 : USB module is in power conserve mode
	0 : USB module is normal operation
!W_ENUMERATION_STATUS,UWSTAT.0:2	(PIC16)
	3 : CONFIGURED
	2 : ADDRESSED
	1 : DEFAULT
	0 : POWERED
!ENDPOINT_ENABLE&DIRECTION,UEP0.1:3	(PIC16)
	7 : Enable endpoints for IN and OUT tokens
	6 : Enable endpoints for OUT tokens only
	5 : Enable endpoints for IN tokens only
	4 : Disable endpoint
	3 : Enable endpoints for IN, OUT and SETUP tokens
	2 : Enable endpoints for OUT tokens only
	1 : Enable endpoints for IN tokens only
	0 : Disable endpoint
!EP_STALL,UEP0.0	(PIC16)
	1 : The endpoint is stalled
	0 : Cleared by SIE
!ENDPOINT_ENABLE&DIRECTION,UEP1.1:3	(PIC16)
	7 : Enable endpoints for IN and OUT tokens
	6 : Enable endpoints for OUT tokens only
	5 : Enable endpoints for IN tokens only
	4 : Disable endpoint
	3 : Enable endpoints for IN, OUT and SETUP tokens
	2 : Enable endpoints for OUT tokens only
	1 : Enable endpoints for IN tokens only
	0 : Disable endpoint
!EP_STALL,UEP1.0	(PIC16)
	1 : The endpoint is stalled
	0 : Cleared by SIE
!ENDPOINT_ENABLE&DIRECTION,UEP2.1:3	(PIC16)
	7 : Enable endpoints for IN and OUT tokens
	6 : Enable endpoints for OUT tokens only
	5 : Enable endpoints for IN tokens only
	4 : Disable endpoint
	3 : Enable endpoints for IN, OUT and SETUP tokens
	2 : Enable endpoints for OUT tokens only
	1 : Enable endpoints for IN tokens only
	0 : Disable endpoint
!EP_STALL,UEP2.0	(PIC16)
	1 : The endpoint is stalled
	0 : Cleared by SIE
#LCD
:PORTF,107,FF	(PIC16)	(LCD)
:PORTG,108,FF	(PIC16)	(LCD)
:LCDSE,10D,FF	(PIC16)	(LCD)
:LCDPS,10E,0F	(PIC16)	(LCD)
:LCDCON,10F,DF	(PIC16)	(LCD)
:LCDD00,110,FF	(PIC16)	(LCD)
:LCDD01,111,FF	(PIC16)	(LCD)
:LCDD02,112,FF	(PIC16)	(LCD)
:LCDD03,113,FF	(PIC16)	(LCD)
:LCDD04,114,FF	(PIC16)	(LCD)
:LCDD05,115,FF	(PIC16)	(LCD)
:LCDD06,116,FF	(PIC16)	(LCD)
:LCDD07,117,FF	(PIC16)	(LCD)
:LCDD08,118,FF	(PIC16)	(LCD)
:LCDD09,119,FF	(PIC16)	(LCD)
:LCDD10,11A,FF	(PIC16)	(LCD)
:LCDD11,11B,FF	(PIC16)	(LCD)
:LCDD12,11C,FF	(PIC16)	(LCD)
:LCDD13,11D,FF	(PIC16)	(LCD)
:LCDD14,11E,FF	(PIC16)	(LCD)
:LCDD15,11F,FF	(PIC16)	(LCD)
!SE29,LCDSE.7	(PIC16)	(LCD)
	1 : Pins have LCD drive function
	0 : Pins have digital input function
!SE27,LCDSE.6	(PIC16)	(LCD)
	1 : Pins have LCD drive function
	0 : Pins have digital input function
!SE20,LCDSE.5	(PIC16)	(LCD)
	1 : Pins have LCD drive function
	0 : Pins have digital input function
!SE16,LCDSE.4	(PIC16)	(LCD)
	1 : Pins have LCD drive function
	0 : Pins have digital input function
!SE12,LCDSE.3	(PIC16)	(LCD)
	1 : Pins have LCD drive function
	0 : Pins have digital input function
!SE9,LCDSE.2	(PIC16)	(LCD)
	1 : Pins have LCD drive function
	0 : Pins have digital input function
!SE5,LCDSE.1	(PIC16)	(LCD)
	1 : Pins have LCD drive function
	0 : Pins have digital input function
!SE0,LCDSE.0	(PIC16)	(LCD)
	1 : Pins have LCD drive function
	0 : Pins have digital input function
!LCDEN,LCDCON.7	(PIC16)	(LCD)
	1 : LCD drive enabled
	0 : LCD drive disabled
!SLPEN,LCDCON.6 (PIC16)	(LCD)
	1 : LCD module will stop operating during SLEEP
	0 : LCD module will continue displaying during SLEEP
!VGEN,LCDCON.4 (PIC16)	(LCD)
	1 : Internal LCD voltage generator enabled, (powered-up)
	0 : Internal LCD voltage generator powered-down, (provide external voltage)
!CS1~0,LCDCON.2:1 (PIC16)	(LCD)
	0 : FOSC/256
	1 : T1CKI (Timer1)
	2 : Internal RC oscillator
	3 : Internal RC oscillator
!LMUX1~0,LCDCON.0:1 (PIC16)	(LCD)
	0 : Mulitplex: Static	(COM0)	BIAS: STATIC	MAX # Segs: 32
	1 : Mulitplex: 1/2	(COM0,1)	BIAS: 1/3	MAX # Segs: 31
	2 : Mulitplex: 1/3	(COM0,1,2)	BIAS: 1/3	MAX # Segs: 30
	3 : Mulitplex: 1/4	(COM0,1,2,3)	BIAS: 1/3	MAX # Segs: 29
#CAN
:TXERRCNT,F76,FF	(!PIC18f6620)	(!PIC18f6720)	(!PIC18f8620)	(!PIC18f8720)
:RXERRCNT,F75,FF	(!PIC18f6620)	(!PIC18f6720)	(!PIC18f8620)	(!PIC18f8720)
:COMSTAT,F74,FF	(!PIC18f6620)	(!PIC18f6720)	(!PIC18f8620)	(!PIC18f8720)
:CIOCON,F73,F0	(!PIC18f6620)	(!PIC18f6720)	(!PIC18f8620)	(!PIC18f8720)
:BRGCON3,F72,47	(!PIC18f6620)	(!PIC18f6720)	(!PIC18f8620)	(!PIC18f8720)
:BRGCON2,F71,FF	(!PIC18f6620)	(!PIC18f6720)	(!PIC18f8620)	(!PIC18f8720)
:BRGCON1,F70,FF	(!PIC18f6620)	(!PIC18f6720)	(!PIC18f8620)	(!PIC18f8720)
:CANCON,F6F,FE	(!PIC18f6620)	(!PIC18f6720)	(!PIC18f8620)	(!PIC18f8720)
:CANSTAT,F6E,EE	(!PIC18f6620)	(!PIC18f6720)	(!PIC18f8620)	(!PIC18f8720)
:RXB0D7,F6D,FF	(!PIC18f6620)	(!PIC18f6720)	(!PIC18f8620)	(!PIC18f8720)
:RXB0D6,F6C,FF	(!PIC18f6620)	(!PIC18f6720)	(!PIC18f8620)	(!PIC18f8720)
:RXB0D5,F6B,FF	(!PIC18f6620)	(!PIC18f6720)	(!PIC18f8620)	(!PIC18f8720)
:RXB0D4,F6A,FF
:RXB0D3,F69,FF
:RXB0D2,F68,FF
:RXB0D1,F67,FF
:RXB0D0,F66,FF
:RXB0DLC,F65,7F
:RXB0EIDL,F64,FF
:RXB0EIDH,F63,FF
:RXB0SIDL,F62,FB
:RXB0SIDH,F61,FF
:RXB0CON,F60,EF
:CANSTATRO0,F5E,EE
:RXB1D7,F5D,FF
:RXB1D6,F5C,FF
:RXB1D5,F5B,FF
:RXB1D4,F5A,FF
:RXB1D3,F59,FF
:RXB1D2,F58,FF
:RXB1D1,F57,FF
:RXB1D0,F56,FF
:RXB1DLC,F55,7F
:RXB1EIDL,F54,FF
:RXB1EIDH,F53,FF
:RXB1SIDL,F52,FB
:RXB1SIDH,F51,FF
:RXB1CON,F50,EF
:CANSTATRO1,F4E,EE
:TXB0D7,F4D,FF
:TXB0D6,F4C,FF
:TXB0D5,F4B,FF
:TXB0D4,F4A,FF
:TXB0D3,F49,FF
:TXB0D2,F48,FF
:TXB0D1,F47,FF
:TXB0D0,F46,FF
:TXB0DLC,F45,4F
:TXB0EIDL,F44,FF
:TXB0EIDH,F43,FF
:TXB0SIDL,F42,EB
:TXB0SIDH,F41,FF
:TXB0CON,F40,7B
:CANSTATR02,F3E,EE
:TXB1D7,F3D,FF
:TXB1D6,F3C,FF
:TXB1D5,F3B,FF
:TXB1D4,F3A,FF
:TXB1D3,F39,FF
:TXB1D2,F38,FF
:TXB1D1,F37,FF
:TXB1D0,F36,FF
:TXB1DLC,F35,4F
:TXB1EIDL,F34,FF
:TXB1EIDH,F33,FF
:TXB1SIDL,F32,EB
:TXB1SIDH,F31,FF
:TXB1CON,F30,7B
:CANSTATRO3,F2E,EE
:TXB2D7,F2D,FF
:TXB2D6,F2C,FF
:TXB2D5,F2B,FF
:TXB2D4,F2A,FF
:TXB2D3,F29,FF
:TXB2D2,F28,FF
:TXB2D1,F27,FF
:TXB2D0,F26,FF
:TXB2DLC,F25,4F
:TXB2EIDL,F24,FF
:TXB2EIDH,F23,FF
:TXB2SIDL,F22,EB
:TXB2SIDH,F21,FF
:TXB2CON,F20,7B
:RXM1EID0,F1F,FF		(!PIC18F248)	(!PIC18F258)	(!PIC18F448)	(!PIC18F458)
:RXM1EID8,F1E,FF		(!PIC18F248)	(!PIC18F258)	(!PIC18F448)	(!PIC18F458)
:RXM1EIDL,F1F,FF		(18F248)
:RXM1EIDH,F1E,FF		(18F248)
:RXM1EIDL,F1F,FF		(18F258)
:RXM1EIDH,F1E,FF		(18F258)
:RXM1EIDL,F1F,FF		(18F448)
:RXM1EIDH,F1E,FF		(18F448)
:RXM1EIDL,F1F,FF		(18F458)
:RXM1EIDH,F1E,FF		(18F458)
:RXM1SIDL,F1D,E3
:RXM1SIDH,F1C,FF
:RXM0EID0,F1B,FF		(!PIC18F248)	(!PIC18F258)	(!PIC18F448)	(!PIC18F458)
:RXM0EID8,F1A,FF		(!PIC18F248)	(!PIC18F258)	(!PIC18F448)	(!PIC18F458)
:RXM0EIDL,F1B,FF		(18F248)
:RXM0EIDH,F1A,FF		(18F248)
:RXM0EIDL,F1B,FF		(18F258)
:RXM0EIDH,F1A,FF		(18F258)
:RXM0EIDL,F1B,FF		(18F448)
:RXM0EIDH,F1A,FF		(18F448)
:RXM0EIDL,F1B,FF		(18F458)
:RXM0EIDH,F1A,FF		(18F458)
:RXM0SIDL,F19,E3
:RXM0SIDH,F18,FF
:RXF5EID0,F17,FF		(!PIC18F248)	(!PIC18F258)	(!PIC18F448)	(!PIC18F458)
:RXF5EID8,F16,FF		(!PIC18F248)	(!PIC18F258)	(!PIC18F448)	(!PIC18F458)
:RXF5EIDL,F17,FF		(18F248)
:RXF5EIDH,F16,FF		(18F248)
:RXF5EIDL,F17,FF		(18F258)
:RXF5EIDH,F16,FF		(18F258)
:RXF5EIDL,F17,FF		(18F448)
:RXF5EIDH,F16,FF		(18F448)
:RXF5EIDL,F17,FF		(18F458)
:RXF5EIDH,F16,FF		(18F458)
:RXF5SIDL,F15,EB
:RXF5SIDH,F14,FF
:RXF4EID0,F13,FF		(!PIC18F248)	(!PIC18F258)	(!PIC18F448)	(!PIC18F458)
:RXF4EID8,F12,FF		(!PIC18F248)	(!PIC18F258)	(!PIC18F448)	(!PIC18F458)
:RXF4EIDL,F13,FF		(18F248)
:RXF4EIDH,F12,FF		(18F248)
:RXF4EIDL,F13,FF		(18F258)
:RXF4EIDH,F12,FF		(18F258)
:RXF4EIDL,F13,FF		(18F448)
:RXF4EIDH,F12,FF		(18F448)
:RXF4EIDL,F13,FF		(18F458)
:RXF4EIDH,F12,FF		(18F458)
:RXF4SIDL,F11,EB
:RXF4SIDH,F10,FF
:RXF3EID0,F0F,FF		(!PIC18F248)	(!PIC18F258)	(!PIC18F448)	(!PIC18F458)
:RXF3EID8,F0E,FF		(!PIC18F248)	(!PIC18F258)	(!PIC18F448)	(!PIC18F458)
:RXF3EIDL,F0F,FF		(18F248)
:RXF3EIDH,F0E,FF		(18F248)
:RXF3EIDL,F0F,FF		(18F258)
:RXF3EIDH,F0E,FF		(18F258)
:RXF3EIDL,F0F,FF		(18F448)
:RXF3EIDH,F0E,FF		(18F448)
:RXF3EIDL,F0F,FF		(18F458)
:RXF3EIDH,F0E,FF		(18F458)
:RXF3SIDL,F0D,EB
:RXF3SIDH,F0C,FF
:RXF2EID0,F0B,FF		(!PIC18F248)	(!PIC18F258)	(!PIC18F448)	(!PIC18F458)
:RXF2EID8,F0A,FF		(!PIC18F248)	(!PIC18F258)	(!PIC18F448)	(!PIC18F458)
:RXF2EIDL,F0B,FF		(18F248)
:RXF2EIDH,F0A,FF		(18F248)
:RXF2EIDL,F0B,FF		(18F258)
:RXF2EIDH,F0A,FF		(18F258)
:RXF2EIDL,F0B,FF		(18F458)
:RXF2EIDH,F0A,FF		(18F458)
:RXF2EIDL,F0B,FF		(18F448)
:RXF2EIDH,F0A,FF		(18F448)
:RXF2SIDL,F09,EB
:RXF2SIDH,F08,FF
:RXF1EID0,F07,FF		(!PIC18F248)	(!PIC18F258)	(!PIC18F448)	(!PIC18F458)
:RXF1EID8,F06,FF		(!PIC18F248)	(!PIC18F258)	(!PIC18F448)	(!PIC18F458)
:RXF1EIDL,F07,FF		(18F248)
:RXF1EIDH,F06,FF		(18F248)
:RXF1EIDL,F07,FF		(18F258)
:RXF1EIDH,F06,FF		(18F258)
:RXF1EIDL,F07,FF		(18F448)
:RXF1EIDH,F06,FF		(18F448)
:RXF1EIDL,F07,FF		(18F458)
:RXF1EIDH,F06,FF		(18F458)
:RXF1SIDL,F05,EB
:RXF1SIDH,F04,FF
:RXF0EIDL,F03,FF
:RXF0EIDH,F02,FF
:RXF0SIDL,F01,EB
:RXF0SIDH,F00,FF
#VRG
:INDF0,FEF,FF	(PIC18)
:POSTINC0,FEE,FF	(PIC18)
:POSTDEC0,FED,FF	(PIC18)
:PREINC0,FEC,FF	(PIC18)
:PLUSW0,FEB,FF	(PIC18)
:FSR0H,FEA,0F	(PIC18)
:FSR0L,FE9,FF	(PIC18)
:INDF1,FE7,FF	(PIC18)
:POSTINC1,FE6,FF	(PIC18)
:POSTDEC1,FE5,FF	(PIC18)
:PREINC1,FE4,FF	(PIC18)
:PLUSW1,FE3,FF	(PIC18)
:FSR1H,FE2,0F	(PIC18)
:FSR1L,FE1,FF	(PIC18)
:INDF2,FDF,FF	(PIC18)
:POSTINC2,FDE,FF	(PIC18)
:POSTDEC2,FDD,FF	(PIC18)
:PREINC2,FDC,FF	(PIC18)
:PLUSW2,FDB,FF	(PIC18)
:FSR2H,FDA,0F	(PIC18)
:FSR2L,FD9,FF	(PIC18)
#PORTS
:PORTA,04,3F	(PIC16)
:PORTB,05,FF	(PIC16)
:PORTC,06,FF	(PIC16)
:PORTD,07,FF	(PIC16)
:PORTE,08,07	(PIC16)
:PORTF,107,FF	(PIC16)	(LCD)
:PORTG,108,FF	(PIC16)	(LCD)
:TRISA,85,3F	(PIC16)
:TRISB,86,FF	(PIC16)
:TRISC,87,FF	(PIC16)
:TRISD,88,FF	(PIC16)
:TRISE,89,F7	(PIC16)
:TRISF,187,FF	(PIC16)	(LCD)
:TRISG,188,FF	(PIC16)	(LCD)
:PORTK,F7D,FF	(PIC18)
:PORTJ,F88,FF	(PIC18)
:PORTH,F87,FF	(PIC18)
:PORTG,F86,FF	(PIC18)
:PORTF,F85,FF	(PIC18)
:PORTE,F84,FF	(PIC18)
:PORTD,F83,FF	(PIC18)
:PORTC,F82,FF	(PIC18)
:PORTB,F81,FF	(PIC18)
:PORTA,F80,FF	(PIC18)
:TRISK,F7F,FF	(PIC18)
:TRISJ,F9A,FF	(PIC18)
:TRISH,F99,FF	(PIC18)
:TRISG,F98,FF	(PIC18)
:TRISF,F97,FF	(PIC18)
:TRISE,F96,FF	(PIC18)
:TRISD,F95,FF	(PIC18)
:TRISC,F94,FF	(PIC18)
:TRIDB,F93,FF	(PIC18)
:TRISA,F92,FF	(PIC18)
:LATK,F7E,FF	(PIC18)
:LATJ,F91,FF	(PIC18)
:LATH,F90,FF	(PIC18)
:LATG,F8F,FF	(PIC18)
:LATF,F8E,FF	(PIC18)
:LATE,F8D,FF	(PIC18)
:LATD,F8C,FF	(PIC18)
:LATC,F8B,FF	(PIC18)
:LATB,F8A,FF	(PIC18)
:LATA,F89,7F	(PIC18)
#IR
:INTCON,0B,C0	(PIC16)
:PIR1,0C,FF		(PIC16)
:PIR2,0D,59		(PIC16)
:PIE1,8C,FF		(PIC16)
:PIE2,8D,59		(PIC16)
:INTCON,FF2,FF	(PIC18)	
:INTCON2,FF1,F5	(PIC18)
:INTCON3,FF0,DB	(PIC18)
:RCON,FD0,DF	(PIC18)
:PIR1,F9E,FF	(PIC18)
:PIE1,F9D,FF	(PIC18)
:IPR1,F9F,FF	(PIC18)
:PIR2,FA1,FF	(PIC18)
:PIE2,FA0,FF	(PIC18)
:IPR2,FA2,FF	(PIC18)
:PIR3,FA4,FF	(PIC18)
:PIE3,FA3,FF	(PIC18)
:IPR3,FA5,FF	(PIC18)
!PSPIF,PIR1.7	(PIC16)
	1 : A read or a write operation has taken place (must be cleared in software)
	0 : No read or write has occurred
!ADIF,PIR1.6
	1 : An A/D conversion completed
	0 : The A/D conversion is not complete
!RCIF,PIR1.5
	1 : The USART receive buffer is full
	0 : The USART receive buffer is empty
!TXIF,PIR1.4
	1 : The USART transmit buffer is empty
	0 : The USART transmit buffer is full
!SSPIF,PIR1.3	(PIC16)
	1 : The SSP interrupt condition has occurred,
	0 : No SSP interrupt condition has occurred.
!CCP1IF,PIR1.2
	1 : A TMR1 register capture occurred
	0 : No TMR1 register capture occurred
!TMR2IF,PIR1.1
	1 : TMR2 to PR2 match occurred (must be cleared in software)
	0 : No TMR2 to PR2 match occurred
!TMR1IF,PIR1.0
	1 : TMR1 register overflowed (must be cleared in software)
	0 : TMR1 register did not overflow
!OSCFIF,PIR2,7	(PIC18)
	1 : System oscillator failed, clock input has changed to INTOSC
	0 : System clock operating
!EEIF,PIR2,4
	1 : The write operation completed
	0 : The write operation is not complete or has not been started
!BCLIF,PIR2,3	(PIC16)
	1 : A bus collision has occurred in the SSP, when configured for I2C Master mode
	0 : No bus collision has occurred
!LVDIF,PIR2,2	(PIC18)
	1 : A low voltage condition occurred
	0 : The device voltage is above the Low Voltage Detect trip point
!TMR3IF,PIR2,1	(PIC18)
	1 : TMR3 register overflowed
	0 : TMR3 register did not overflow
!CCP2IF,PIR2,0	(PIC16)
	1 : A TMR1 register capture occurred
	0 : No TMR1 register capture occurred
!GIE,INTCON.7	(PIC16)
	1 : All un-masked interrupts enabled
	0 : All interrupts disabled
!GIE/GIEH,RCON.7:INTCON.7	(PIC18)
	3 : All high priority interrupts enabled
	2 : All high priority interrupts disabled 
	1 : All unmasked interrupts enabled
	0 : All interrupts disabled
!PEIE,INTCON.6	(PIC16)
	1 : All un-masked peripheral interrupts enabled
	0 : All peripheral interrupts disabled
!PEIE/GIEL,RCON,7:INTCON.6	(PIC18)
	3 : All unmasked peripheral interrupts enabled
	2 : All peripheral interrupts disabled
	1 : All low priority peripheral interrupts enabled
	0 : All low priority peripheral interrupts disabled
!TMR0IE,INTCON.5	(PIC18)
	1 : TMR0 overflow interrupt enabled
	0 : TMR0 overflow interrupt disabled
!TMRE,INTCON.5	(PIC16)
	1 : TMR0 overflow interrupt enabled
	0 : TMR0 overflow interrupt disabled
!INT0IE,INTCON.4	(PIC18)
	1 : INT0 external interrupt enabled
	0 : INT0 external interrupt disabled
!INTE,INTCON.4	(PIC16)
	1 : RB0/INT external interrupt enabled
	0 : RB0/INT external interrupt disabled
!RBIE,INTCON.3	
	1 : RB port change interrupt enabled
	0 : RB port change interrupt disabled
!TMR0IF,INTCON.2	(PIC18)
	1 : TMR0 register has overflowed (must be cleared in software)
	0 : TMR0 register did not overflow
!TMRF,INTCON.2	(PIC16)
	1 : TMR0 register has overflowed (must be cleared in software)
	0 : TMR0 register did not overflow
!INTF,INTCON.1
	1 : The INT0 external interrupt occurred (must be cleared in software)
	0 : The INT0 external interrupt did not occur
!RBIF,INTCON.0
	1 : At least one of the RB7:RB4 pins changed state (must be cleared in software)
	0 : None of the RB7:RB4 pins have changed state
!RBPU,INTCON2.7	(PIC18)
	1 : All PORTB pull-ups are disabled
	0 : PORTB pull-ups are enabled by individual port latch values
!INTEDG0,INTCON2.6	(PIC18)
	1 : Interrupt on rising edge
	0 : Interrupt on falling edge
!INTEDG1,INTCON2.5	(PIC18)
	1 : Interrupt on rising edge
	0 : Interrupt on falling edge
!INTEDG2:INTCON2.4	(PIC18)
	1 : Interrupt on rising edge
	0 : Interrupt on falling edge
!TMR0IP:INTCON2.	(PIC18)
	1 : TMR0 Overflow Interrupt Priority bit: High priority
	0 : TMR0 Overflow Interrupt Priority bit: Low  priority
!RBIP:INTCON2.0	(PIC18)
	1 : RB Port Change Interrupt Priority bit: High priority
	0 : RB Port Change Interrupt Priority bit: Low  priority
!INT2IP,INTCON3.7	(PIC18)
	1 : INT2 External Interrupt Priority bit: High priority
	0 : INT2 External Interrupt Priority bit: Low  priority
!INT1IP,INTCON3.6	(PIC18)
	1 : INT1 External Interrupt Priority bit: High priority
	0 : INT1 External Interrupt Priority bit: Low  priority
!INT2IE,INTCON3.4	(PIC18)
	1 : INT2 external interrupt enabled
	0 : INT2 external interrupt disabled
!INT1IE,INTCON3.3	(PIC18)
	1 : INT1 external interrupt is enabled
	0 : INT1 external interrupt is disabled
!INT2IF,INTCON3.1	(PIC18)
	1 : The INT2 external interrupt occurred (must be cleared in software) 
	0 : The INT2 external interrupt did not occur
!INT1IF:INTCON3.0	(PIC18)
	1 : The INT1 external interrupt occurred (must be cleared in software)
	0 : The INT1 external interrupt did not occur
#TIMER4
:TMR0,01,FF		(PIC16)
:TMR1L,0E,FF	(PIC16)	(TIM1)
:TMR1H,0F,FF	(PIC16)	(TIM1)
:T1CON,10,3F	(PIC16)	(TIM1)
:TMR2,11,FF		(PIC16)	(TIM2)
:T2CON,12,7F	(PIC16)	(TIM2)
:TMR0H,FD7,FF	(PIC18)
:TMR0L,FD6,FF	(PIC18)
:T0CON,FD5,FF	(PIC18)
:TMR1H,FCF,FF	(PIC18)
:TMR1L,FCE,FF	(PIC18)
:T1CON,FCD,BF	(PIC18)
:TMR2 ,FCC,FF	(PIC18)
:T2CON,FCA,7F	(PIC18)
:TMR3H,FB3,FF	(PIC18)
:TMR3L,FB2,FF	(PIC18)
:T3CON,FB1,FF	(PIC18)
:TMR4 ,F78,FF	(PIC18)
:T4CON,F76,7F	(PIC18)
!TMR0ON,T0CON.7
	1 : Timer0 enabled
	0 : Timer0 stoped
!T08BIT,T0CON.6
	1 : Timer0 is configured as an 8-bit timer/counter
	0 : Timer0 is configured as a 16-bit timer/counter
!T0CS,T0CON.5
	1 : Transition on T0CKI pin
	0 : Internal instruction cycle clock (CLKOUT)
!T0SE,T0CON.4
	1 : Increment on high-to-low transition on T0CKI pin
	0 : Increment on low-to-high transition on T0CKI pin
!PSA,T0CON.3
	1 : TImer0 prescaler is NOT assigned. Timer0 clock input bypasses prescaler.
	0 : Timer0 prescaler is assigned. Timer0 clock input comes from prescaler output.
!T0PS,T0CON.0:2
	7 : 1:256 prescale value
	6 : 1:128 prescale value
	5 : 1:64 prescale value
	4 : 1:32 prescale value
	3 : 1:16 prescale value
	2 : 1:8 prescale value
	1 : 1:4 prescale value
	0 : 1:2 prescale value
!RD16,T1CON.7
	1 : Enables register Read/Write of Timer1 in one 16-bit operation
	0 : Enables register Read/Write of Timer1 in two 8-bit operations
!T1CKSP,T1CON.4:1
	3 : 1:8 Prescale value
	2 : 1:4 Prescale value
	1 : 1:2 Prescale value
	0 : 1:1 Prescale value
!T1OSCEN,T1CON.3
	1 : Timer1 Oscillator is enabled
	0 : Timer1 Oscillator is shut-off
!T1SYNC,T1CON.2
	1 : Do not synchronize external clock input
	0 : Synchronize external clock input
!TMR1CS,T1CON.1
	1 : External clock from pin RC0/T1OSO/T13CKI (on the rising edge)
	0 : Internal clock (FOSC/4)
!TMR1ON,T1CON.0
	1 : Enables Timer1
	0 : Stops Timer1
!T2OUTPS,T2CON.3:3
	0  : 1:1 Postscale
	1  : 1:2 Postscale
	2  : 1:3 Postscale
	3  : 1:4 Postscale
	4  : 1:5 Postscale
	5  : 1:6 Postscale
	6  : 1:7 Postscale
	7  : 1:8 Postscale
	8  : 1:9 Postscale
	9  : 1:10 Postscale
	10 : 1:11 Postscale
	11 : 1:12 Postscale
	12 : 1:13 Postscale
	13 : 1:14 Postscale
	14 : 1:15 Postscale
	15 : 1:16 Postscale
!TMR20N,T2CON.2
	1 : Timer2 is on
	0 : Timer2 is off
!T2CKPS,T2CON.0:1
	0 : Prescaler is 1
	1 : Prescaler is 4
	2 : Prescaler is 16
	3 : Prescaler is 16
#EEPROM
:EEDATA,08,FF	(16LF84A)
:EEADR,09,FF	(16LF84A)
:EECON1,88,1F	(16LF84A)
:EECON2,89,FF	(16LF84A)
:EEDATA,9A,FF	(PIC16)	(EEPROM)	(!PIC16LF84A)
:EEADR,9B,7F	(PIC16)	(EEPROM)	(!PIC16LF84A)
:EECON1,9C,0F	(PIC16)	(EEPROM)	(!PIC16LF84A)
:EECON2,9D,0F	(PIC16)	(EEPROM)	(!PIC16LF84A)
:EEDATA,10C,FF	(PIC16)	(EEPROM)
:EEADR,10D,FF	(PIC16)	(EEPROM)
:EEDATH,10E,3F	(PIC16)	(EEPROM)
:EEADRH,10F,1F	(PIC16)	(EEPROM)
:EEADR,FA9,FF	(PIC18)	(EEPROM)
:EEDATA,FA8,FF	(PIC18)	(EEPROM)
:EECON2,FA7,FF	(PIC18)	(EEPROM)
:EECON1,FA6,DF	(PIC18)	(EEPROM)
!EEPGD,EECON1.7	(PIC18)	(EEPROM)
	1 : Access program FLASH memory
	0 : Access data EEPROM memory
!CFGS,EECON1.6	(PIC18)	(EEPROM)
	1 : Access configuration registers
	0 : Access program FLASH or data EEPROM memory
!FREE,EECON1.4	(PIC18)	(EEPROM)
	1 : Erase the program memory row addressed by TBLPTR on the next WR command
	0 : Perform write only
!WRERR,EECON1.3	(EEPROM)
	1 : A write operation is prematurely terminated
	0 : The write operation completed
!WREN,EECON1.2	(EEPROM)
	1 : Allows write cycles
	0 : Inhibits write to the data EEPROM
!WR,EECON1.1	(EEPROM)
	1 : Write to EEPROM initiated
	0 : Write cycle to the data EEPROM is complete
!RD,EECON1.0	(EEPROM)
	1 : Read to EEPROM initiated
	0 : Read cycle to the data EEPROM is complete
#OSR
:LVDCON,9C,3F	(PIC16)
:LININTF,90,03	(PIC16)
:VRCON,9F,EF	(PIC16)
:STATUS,03,FF	(PIC16)
:OSCCAL,8F,FF	(PIC16)
:OPTION_REG,81,FF	(PIC16)
:WPUB,95,FF		(PIC16)
:IOCB,96,FF		(PIC16)
:P1DEL,97,FF	(PIC16)
:PMDATL,10C,FF	(PIC16)	(TIM0)	(CC1)	(PWM1)
:PMADRL,10D,FF	(PIC16)	(TIM0)	(CC1)	(PWM1)
:PMDATH,10E,FF	(PIC16)	(TIM0)	(CC1)	(PWM1)
:PMADRH,10F,FF	(PIC16)	(TIM0)	(CC1)	(PWM1)
:REFCON,9B,0C	(PIC16)	(PWM2)
:LVDCON,9C,3F	(PIC16)	(VREF)
:ANSEL,9D,FF	(PIC16)
:CALCON,110,E0	(PIC16)	(COMP)
:PSMCCON0,111,FF	(PIC16)	(PWM2)
:PSMCCON1,112,EF	(PIC16)	(PWM2)
:CM1CON0,119,FF	(PIC16)	(CC1)
:CM2CON0,11A,FF	(PIC16)	(CC2)
:CM2CON1,11B,C1	(PIC16)	(CC1)	(CC2)
:OPACON,11C,C1	(PIC16)	(CC1)	(CC2)
:DACON0,11F,C3	(PIC16)	(CC1)	(CC2)	(VREF)
:DAC,11E,FF		(PIC16)	(CC1)	(CC2)	(VREF)
:PMDATA,18C,FF	(PIC16)	(LCD)
:PMADR,18D,3F	(PIC16)	(LCD)
:PMDATH,18E,3F	(PIC16)	(LCD)
:PMADRH,18F,1F	(PIC16)	(LCD)
:STATUS,FD8,1F	(PIC18)
:STKPTR,FFC,DF	(PIC18)
:TOSU,FFF,1F	(PIC18)
:TOSH,FFE,FF	(PIC18)
:TOSL,FFD,FF	(PIC18)
:PCLATU,FFB,1F	(PIC18)
:PCLATH,FFA,FF	(PIC18)
:PCL,FF9,FF		(PIC18)
:TBLPTRU,FF8,3F	(PIC18)
:TBLPTRH,FF7,FF	(PIC18)
:TBLPTRL,FF6,FF	(PIC18)
:TABLAT,FF5,FF	(PIC18)
:PRODH,FF4,FF	(PIC18)
:PRODL,FF3,FF	(PIC18)
:WREG,FE8,FF	(PIC18)
:BSR,FE0,0F		(PIC18)
:OSCCON,FD3,01	(PIC18)
:LVDCON,FD2,FF	(PIC18)
:WDTCON,FD1,01	(PIC18)
:RCON,FD0,DF	(PIC18)
:SSPADD,FC8,FF	(PIC18)
:SSPCON1,FC6,FF	(PIC18)
:SSPCON2,FC5,FF	(PIC18)
:CSEL2,FA7,FF	(PIC18)
:CSELIO,FA6,FF	(PIC18)
:PSPCON,FB0,03	(PIC18)
:MEMCON,F9C,F3	(PIC18)
:cVRCON,FB5,FF	(PIC18)
:OSCTUNE,F9B,3F	(PIC18)
!VREN,VRCON.7	(PIC16)	
	0 : VREF circuit powered down, no IDD drain
	1 : VREF circuit powered on
!VROE,VRCON.6	(PIC16)
	0 : VREF is disconnected from RA2 pin
	1 : VREF is output on RA2 pin
!VRR,VRCON.5	(PIC16)
	0 : High Range
	1 : Low Range
!BGST,LVDCON.5
	1 : Bandgap voltage is stable, LVD interrupt is reliable
	0 : Bandgap voltage is not stable, LVD interrupt should not be enabled
!LVDEN,LVDCON.4
	1 : LVD Enabled, power up bandgap circuit & reference generator
	0 : Eisables LVD, power down bandgap circuit if unused by BOR or VRH/VRL
!LV,LVDCON.0:4
	15 : External analog input is used
	14 : 4.5V
	13 : 4.2V
	12 : 4.0V
	11 : 3.8V
	10 : 3.6V
	9 : 3.5V
	8 : 3.3V
	7 : 3.0V
	6 : 2.8V
	5 : 2.7V
	4 : 2.5V
	3 : Reserved, do not use.
	2 : Reserved, do not use.
	1 : Reserved, do not use.
	0 : Reserved, do not use.
!IRP,STATUS.7	(PIC16)
	0 : Bank 0, 1 (00h - FFh)
	1 : Bank 2, 3 (100h - 1FFh)
!RP0,STATUS.5:2	(PIC16)
	0 : Bank 3 (180h - 1FFh)
	1 : Bank 2 (100h - 17Fh)
	2 : Bank 1 (80h - FFh)
	3 : Bank 0 (00h - 7Fh)
!TO,STATUS.4	(PIC16)
	0 : A WDT time-out occurred
	1 : After power-up, CLRWDT instruction, or SLEEP instruction
!PD,STATUS.3	(PIC16)
	0 : By execution of the SLEEP instruction
	1 : After power-up or by the CLRWDT instruction
!Z,STATUS.2	(PIC16)
	0 : The result of an arithmetic or logic operation is not zero
	1 : The result of an arithmetic or logic operation is zero
!DC,STATUS.1	(PIC16)
	0 : No carry-out from the 4th low order bit of the result
	1 : A carry-out from the 4th low order bit of the result occurred
!C,STATUS.0	(PIC16)
	0 : No carry-out from the most significant bit of the result occurred
	1 : A carry-out from the most significant bit of the result occurred
!CALFST,OSCCAL.3	(PIC16)
	0 : No change
	1 : Increase frequency
!CALSLW,OSCCAL.2	(PIC16)
	0 : No change
	1 : Decrease frequency
!RBPU,OPTION_REG.7	(PIC16)
	1 : PORTB weak pull-ups are disabled
	0 : PORTB weak pull-ups are enables by the WPUB register
!INTEDG,OPTION_REG.6	(PIC16)
	1 : Interrupt on rising edge of RB0/INT pin
	0 : Interrupt on falling edge of RB0/INT pin
!T0CS,OPTION_REG.5
	1 : Transition on RA4/T0CKI pin
	0 : Internal instruction cycle clock (CLKOUT)
!T0SE,OPTION_REG.4
	1 : Increment on high-to-low transition on RA4/T0CKI pin
	0 : Increment on low-to-high trnasition on RA4/T0CKI pin
!PSA,OPTION_REG.3
	1 : Prescaler is assigned to the WDT
	0 : Prescaler is assigned to the Timer0 module
!PS,OPTION_REG.0:3
	0 : TMR0 1:2	WDT Rate 1:1
	1 : TMR0 1:4	WDT Rate 1:2
	2 : TMR0 1:8	WDT Rate 1:4
	3 : TMR0 1:16	WDT Rate 1:8
	4 : TMR0 1:32	WDT Rate 1:16
	5 : TMR0 1:64	WDT Rate 1:32
	6 : TMR0 1:128	WDT Rate 1:64
	7 : TMR0 1:256	WDT Rate 1:128
!N,STATUS.4	(PIC18)
	1 : Negative result
	0 : Positive result
!OV,STATUS.3	(PIC18)
	1 : OVERFLOW (occurred for signed arithmeic)
	0 : NO OVERLOW
!Z,STATUS.2	(PIC18)
	1 : Result of arithmetic or logic operation is 0
	0 : Result of arithmetic or logic operation is NOT 0
!DC,STATUS.1
	1 : Carry-out from the 4th low order bit of the result occourred
	0 : No carry-out from the 4th low order bit of the result occourred 
!C,STATUS.0
	1 : A carry-out fron the Most Significant bit of the result occourred
	0 : No carry-out from the Most Significant bit of the result occourred
!VREN,REFCON.3	(PIC16)	(PWM2)
	1 : VR reference is enabled
	0 : VR reference is disabled
!VROE,REFCON.2	(PIC16)	(PWM2)
	1 : Enabled, VR voltage reference is output on RB0
	0 : Voltage reference is not available externally
!BGST,LVDCON.5	(PIC16)	(VREF)
	1 : Reference is stable 
	0 : Reference is not stable
!LVDEN,LVDCON.4	(PIC16)	(VREF)
	1 : Enables PLVD, powers up LVD circuit
	2 : Deisbles PLVD, powers down LVD circuit.
!LVDLB,LVDCON.5	(PIC16)	(VREF)
	15: Reserved
	14: 4.5V
	13: 4.2V
	12: 4.0V
	11: 3.8V
	10: 3.6V
	9 : 3.5V
	8 : 3.3V
	7 : 3.0V
	6 : 2.8V
	5 : 2.7V
	4 : 2.5V
	3 : Below valid operating voltage
	2 : Below valid operating voltage
	1 : Below valid operating voltage
	0 : Below valid operating voltage
!CAL,CALCON.7	(PIC16)	(COMP)
	1 : Initates a calibration
	0 : Reserved (CAL is cleared by hardware)
!CALERR,CALCON.6	(PIC16)	(COMP)
	1 : Error occurred, OPAMP failed
	0 : No error
!CALREF,CALCON.5	(PIC16)	(COMP)
	1 : VDAC set to desired comon voltage reference
	0 : 1.2V nominal source (internal voltage source)
!SMCCL,PSMCCON0.6:1	(PIC16)	(PWM2)
	0 : Output frequency for single output mose is FOSC/128
	1 : Output frequency for single output mose is FOSC/64
	2 : Output frequency for single output mose is FOSC/32
	3 : Output frequency for single output mose is FOSC/16
!MINDC,PSMCCON0.4:1	(PIC16)	(PWM2)
	0 : Min duty cycle of 0
	1 : Min duty cycle of 1/8
	2 : Min duty cycle of 1/4
	3 : Min duty cycle of 3/8
!MAXDC,PSMCCON0.2:1	(PIC16)	(PWM2)
	0 : Max duty cycle of 1/2
	1 : Max duty cycle of 5/8
	2 : Max duty cycle of 3/4
	3 : Max duty cycle of 15/16
!DC,PSMCCON0.0:1	(PIC16)	(PWM2)
	0 : Duty cycle of 1/8
	1 : Duty cycle of 3/8
	2 : Duty cycle of 5/8
	3 : Duty cycle of 15/16
!SMCON,PSMCCON1.7	(PIC16)	(PWM2)
	1 : PSMC module on
	0 : PSMC module off
!S1APOL,PSMCCON1.6	(PIC16)	(PWM2)
	1 : PSMC1A outpu signal is asserted low
	0 : PSMC1A outpu signal is asserted high
!S1BPOL,PSMCCON1.5	(PIC16)	(PWM2)
	1 : PSMC1B output isgnal is asserted low
	0 : PSMC1B output isgnal is asserted high
!SCEN,PSMCCON1.3 PSMCCON.7		(PIC16)	(PWM2)
	3 : Bit is ignored
	2 : Slope compensation switch on PSMC1B is enabled
	1 : Bit is ignored
	0 : Slope compensation switch on PSMC1B is not enabled
!SMCON,PSMCCON1.2		(PIC16)	(PWM2)
	1 : Dual alternating output mode. The module outpus are availabe on the PSMC1A and PSMC1B pins
	0 : Single output mose. The module output is available on the PSMC1A pin
!PWM/!PSM,PSMCCON1.1	(PIC16)	(PWM2)
	1 : PWM mode (Pulse width modulation)
	0 : PWM mode (Pulse skipping modulation)
!SMCCS,PSMCCON1.0	(PIC16)	(PWM2)
	1 : PSMC module uses inputs from boh C1OUT and C2OUT
	0 : SMC module uses input from C1OUT only
!C1ON,CM1CON0.7	(PIC16)	(CC1)
	1 : C1 Comparator is enabled
	0 : C1 Comparator is disabled
!C1OUT,CM1CON0.4 CM1CON0.6	(PIC16)	(CC1)
	3 : C1OUT = 1, C1VP < C1VN
	2 : C1OUT = 0, C1VP > C1VN
	1 : C1OUT = 1, C1VP > C1VN
	0 : C1OUT = 0, C1VP < C1VN
!C1OE,CM1CON0.5	(PIC16)	(CC1)
	1 : C1OUT is present on the RB6/C1/PSMC1A pin
	0 : C1OUT is internal only
!C1POL,CM1CON0.4	(PIC16)	(CC1)
	1 : C1OUT logic is inverted
	0 : C1OUT logic is not inveted
!C1SP,CM1CON0.3	(PIC16)	(CC1)
	1 : C1 operates in normal speed mode
	0 : C1 operates in low power, slow speed mode
!C1R,CM1CON0.2	(PIC16)	(CC1)
	1 : C1VP connects to VDAC output
	0 : C1VP connects to VREF 1
!C1CH,CM1CON0.0:1	(PIC16)	(CC1)
	0 : C1VN of C1 connects to AN4
	1 : C1VN of C1 connects to AN5
	2 : C1VN of C1 connects to AN6
	3 : C1VN of C1 connects to AN7
!C2ON,CM2CON0.7	(PIC16)	(CC2)
	1 : C2 Comparator is enabled
	0 : C2 Comparator is disabled
!C2OUT,CM2CON0.4 CM1CON0.6	(PIC16)	(CC2)
	3 : C2OUT = 1, C2VP < C2VN
	2 : C2OUT = 0, C2VP > C2VN
	1 : C2OUT = 1, C2VP > C2VN
	0 : C2OUT = 0, C2VP < C2VN
!C2OE,CM1CON0.5	(PIC16)	(CC2)
	1 : C2OUT is present on the RB6/C2/PSMC1B
	0 : C2OUT is internal only
!C2POL,CM1CON0.4	(PIC16)	(CC2)
	1 : C2OUT logic is inverted
	0 : C2OUT logic is not inveted
!C2SP,CM1CON0.3	(PIC16)	(CC2)
	1 : C2 operates in normal speed mode
	0 : C2 operates in low power, slow speed mode
!C2R,CM1CON0.2	(PIC16)	(CC2)
	1 : C2VP connects to VDAC output
	0 : C2VP connects to VREF 1
!C2CH,CM1CON0.0:1	(PIC16)	(CC2)
	0 : C2VN of C2 connects to AN4
	1 : C2VN of C2 connects to AN5
	2 : C2VN of C2 connects to AN6
	3 : C2VN of C2 connects to AN7
!C2SYNC,CM2CON1.0	(PIC16)	(CC1)	(CC2)
	1 : C2 Output is synchronous to falling edge of TMR1 clock
	0 : C2 output is asynchronous
!OPAON,OPACON.7	(PIC16)	(CC1)	(CC2)
	1 : OPAMP is enabled
	0 : OPAMP is disabled
!CMPEN,OPACON.6	(PIC16)	(CC1)	(CC2)
	1 : Comparator mode
	0 : OPAMP mode
!GBWP,OPACON.1	(PIC16)	(CC1)	(CC2)
	1 : 2 MHz typ (fast mode)
	0 : 70 kKz typ. (slow mode)
!DAON,DACON0.7	(PIC16)	(CC1)	(CC2)	(VREF)
	1 : DAC enabled
	0 : DAC disabled
!DAOE,DACON0.6	(PIC16)	(CC1)	(CC2)	(VREF)
	1 : Output on the VDAC pin
	0 : Outout is not available for external use
!DARS,DACON0.0:1	(PIC16)	(CC1)	(CC2)	(VREF)
	0 : Analog supply, AVDD
	1 : Comparator reference, VREF 1 pin
	2 : Voltage reference, VR
	3 : Reserved, do not use
!STKFUL,STKPTR.7	(PIC18)
	1 : Stack became full or overflowed
	0 : Stack has not become full or overflowed
!STKUNF,STKPTR.6	(PIC18)
	1 : Stack underflow occurred
	0 : Stack underflow did not occur
!SCS,LVDCON.0	(PIC18)
	1 : Switch to Timer1 oscillator/clock pin
	0 : Use primary oscillator/clock input pin
!IRVST,LVDCON.5	(PIC18)
	1 : The Low Voltage Detect logic will generate the interrupt flag at the specified voltage range
	0 : The Low Voltage Detect logic will not generate the interrupt flag at the specified voltage range and the LVD interrupt should not be enabled
!LVDEN,LVDCON.4	(PIC18)
	1 : LVD circuit powered up & Enabled
	0 : LVD circuit powered down & Disabled
!LVDLB,LVDCON.0:3	(PIC18)
	15: External analog input is used (input comes from the LVDIN pin)
	14: 4.5V min. - 4.77V max.
	13: 4.2V min. - 4.45V max.
	12: 4.0V min. - 4.24V max.
	11: 3.8V min. - 4.03V max.
	10: 3.6V min. - 3.82V max.
	9 : 3.5V min. - 3.71V max.
	8 : 3.3V min. - 3.50V max.
	7 : 3.0V min. - 3.18V max.
	6 : 2.8V min. - 2.97V max.
	5 : 2.7V min. - 2.86V max.
	4 : 2.5V min. - 2.65V max.
	3 : 2.4V min. - 2.54V max.
	2 : 2.2V min. - 2.33V max.
	1 : 2.0V min. - 2.12V max.
	0 : 1.8V min. - 1.91V max.
!SWDTEN,WDTCON.0	(PIC18)
	1 : Watchdog Timer is on
	0 : Watchdog Timer is turned off if the WDTEN configuration bit in the configuration register = 0
!IPEN,RCON.7	(PIC18)
	1 : Enable priority levels on interrupts
	0 : Disable priority levels on interrupts (16CXXX compatibility mode)
!LWRT,RCON.6	(PIC18)
	1 : Enable TBLWT to internal program memory
	0 : Disable TBLWT to internal program memory; TBLWT only to external program memory
!RI,RCON.4	(PIC18)
	1 : The RESET instruction was not executed
	0 : The RESET instruction was executed causing a device RESET
!TO,RCON.3	(PIC18)
	1 : After power-up, CLRWDT instruction, or SLEEP instruction
	0 : A WDT time-out occurred
!PD,RCON.2	(PIC18)
	1 : After power-up or by the CLRWDT instruction
	0 : By execution of the SLEEP instruction
!POR,RCON.1	(PIC18)
	1 : A Power-on Reset has not occurred
	0 : A Power-on Reset occurred
!BOR,RCON.0	(PIC18)
	1 : A Brown-out Reset has not occurred
	0 : A Brown-out Reset occurred
!WCOL,SSPCON1.7	(PIC18)
	1 : A write to the SSPBUF register was attempted 
	0 : No collision
!SSPOV,SSPCON1.6	(PIC18)
	1 : A new byte is received while the SSPBUF register is still holding the previous data
	0 : No overflow
!SSPEN,SSPCON1.5	(PIC18)
	1 : Enabled serial port and configures SCK, SDO, SDI, and SS as the source of the serial port pins
	0 : Disabled serial port and configures these pins as I/O port pins
!CKP,SSPCON1.4	(PIC18)
	1 : SPI mode: Idle state for clock is a high level 	I2C mode: Enable clock
	0 : SPI mode: Idle state for clock is a low level		I2C mode: Holds clock low
!SSPM3,SSPCON1.0:3	(PIC18)
	15: I2C Slave mode, 10-bit address with START and STOP bit interrupts enabled
	14: I2C Slave mode, 7-bit address with START and STOP bit interrupts enabled
	13: Reserved
	12: Reserved
	11: I2C firmware controlled Master mode (Slave idle)
	10: Reserved
	9 : Reserved
	8 : I2C Master mode, clock = FOSC / (4 * (SSPADD+1))
	7 : I2C Slave mode, 10-bit address
	6 : I2C Slave mode, 7-bit address
	5 : SPI Slave mode, clock = SCK pin. SS pin control disabled. SS can be used as I/O pin.
	4 : SPI Slave mode, clock = SCK pin. SS pin control enabled.
	3 : SPI Master mode, clock = TMR2 output/2
	2 : SPI Master mode, clock = FOSC/64
	1 : SPI Master mode, clock = FOSC/16
	0 : SPI Master mode, clock = FOSC/4
!GCEN,SSPCON2.7	(PIC18)
	1 : Enable interrupt when a general call address (0000h) is received in the SSPSR
	0 : General call address disabled
!ACKSTAT,SSPCON2.6	(PIC18)
	1 : Acknowledge was not received from slave
	0 : Acknowledge was received from slave
!ACKDT,SSPCON2.5	(PIC18)
	1 : Not Acknowledge
	0 : Acknowledge
!ACKEN,SSPCON2.4	(PIC18)
	1 : Initiate Acknowledge sequence on SDA and SCL pins, and transmit ACKDT data bit. 
	0 : Acknowledge sequence idle
!RCEN,SSPCON2.3	(PIC18)
	1 : Enables Receive mode for I2C
	0 : Receive idle
!PEN,SSPCON2.2	(PIC18)
	1 : Initiate STOP condition on SDA and SCL pins. Automatically cleared by hardware.
	0 : STOP condition idle
!RSEN,SSPCON2.1	(PIC18)
	1 : Initiate Repeated START condition on SDA and SCL pins.
	0 : Repeated START condition idle
!SEN,SSPCON2.0	(PIC18)
	1 : Initiate START condition on SDA and SCL pins.
	0 : START condition idle
!EBDIS,MEMCON.7	(PIC18)
	1 : External system bus disabled, all external bus drivers are mapped as I/O ports
	0 : External system bus enabled, and I/O ports are disabled
!PGRM,MEMCON.6	(PIC18)
	1 : 512 bytes of internal RAM enabled as internal program memory. Internal GPR memory from 400h to 5FFh is disabled and returns 00h.
	0 : Internal RAM enabled as internal GPR memory from 400h to 5FFh. Program memory from location 1FFE00h to 1FFFFFh is configured as external program memory.
!WAIT,MEMCON.4:1	(PIC18)
	3 : Table reads and writes will wait 0 TCY
	2 : Table reads and writes will wait 1 TCY
	1 : Table reads and writes will wait 2 TCY
	0 : Table reads and writes will wait 3 TCY
!WM,MEMCON.TABLWT	(PIC18)
	3 : Word Write mode
	2 : Word Write mode
	1 : Byte Select mode
	0 : Byte Write mode
!VREN,cVRCON.7	(PIC18)
	1 : CVREF circuit powered on
	0 : CVREF circuit powered down
!VROE,cVRCON.6	(PIC18)
	1 : CVREF voltage level is also output on the RF5/AN10/CVREF pin
	0 : CVREF voltage is disconnected from the RF5/AN10/CVREF pin
!VRR,cVRCON.5	(PIC18)
	1 : 0.00 CVRSRC to 0.75 CVRSRC, with CVRSRC/24 step size
	0 : 0.25 CVRSRC to 0.75 CVRSRC, with CVRSRC/32 step size
!VRSS,cVRCON.4	(PIC18)
	1 : Comparator reference source CVRSRC = VREF+-VREF-
	0 : Comparator reference source CVRSRC = VDD-VSS
!TUN,OSCTUNE.0:5	(PIC18)
	31: Maximum Frequency
	0 : Center Frequency
	32: Minimum Frequency
